Digital Signal Processing Reference
In-Depth Information
Use dual stripline (but this can cause crosstalk unless signals are routed
orthogonally).
•
Use thin core laminate technology between the power and ground planes (but
this may not be cost-effective in price-sensitive products).
•
Improve routing density to reduce the number of routing layers by using nar-
row traces (but this increases signal loss on long traces and may reduce the
number of vendors capable of second sourcing the board).
•
Use low impedance traces on inner layers (but this increases the current
driven by I/O devices and may create SSN problems).
•
Use a low dielectric constant laminate system (this works best when the
board has many layers).
•
Consider using half-ounce or quarter-ounce copper for traces and planes (this
only provides a slight reduction; the loss and current handling effects must
be analyzed).
•
Consider removing some power planes by splitting them for use by more
than one supply voltage. This may require components to be rearranged on
the board.
•
Consider replacing power planes with power islands located on the board
surface.
•
Consider routing slow, noncritical stripline signals on a layer where one of
the planes is not the I/O voltage. For acceptable operation this requires care-
ful design and analysis.
•
If the board is too thick to accommodate a particular connector at the edge
of a board, the circuit board fabricator can reduce the thickness in selective
regions. This technique is not always cost-effective, but it allows the stackup
to accommodate many planes and routing layers while simultaneously being
thinner at the board edge.
•
16.9
Steps to Take When There Are Not Enough Routing Layers
Use dual stripline to increase the number of routing layers without adding
too much thickness.
•
Improve routing density to reduce the number of routing layers by using nar-
row traces (but this increases signal loss on long traces and may reduce the
number of vendors capable of second sourcing the board).
•
Use low-impedance traces on inner layers and decrease the separation be-
tween traces (but this increases crosstalk and the current driven by I/O de-
vices and may require that the nets be terminated).
•
Consider removing some power planes by splitting them for use by more
than one supply voltage, or using power islands, and using the free layer for
routing.
•
