Digital Signal Processing Reference
In-Depth Information
Resistors
R
1 and
R
2 can be found in terms of
V
dd
and
V
term
by simultaneously
solving these two equations, producing (12.3a) and (12.3b).
VR
V
×
R
1
=
dd
term
(12.3a)
term
RV
1
×
R
2
=
term
(12.3b)
VV
−
dd
term
The Problems show how to use these equations, but as an example, to obtain
R
term
of 50
Ω
and 1.65V for
V
term
when
V
dd
is 5V, we first use (12.3a) and find
152
. Once these values
are known, (12.1) and (12.2) can be used to determine how changes in resistance
due to temperature or component tolerance affects
R
term
and how changes in
V
dd
affects
V
term
.
Resistors
R
1 and
R
2 can be separate, discrete resistors or a resistor network
component. The matching between resistors is superior with the networks, but
crosstalk and ground bounce can be worse than when using discrete devices. In
general, surface mount devices have lower parasitic inductance and offer better
high-frequency response than through-hole devices, with BGA devices giving the
best response [1].
However, when using resistor networks, it is important to verify by simulation
(and later during DVT) that crosstalk and simultaneous switching effects do not
cause unacceptable amounts of noise for those terminators that share a common
power and ground connection within the device.
Ω
for R1. This value is used in (12.3b) to find that
R
2 is 75
Ω
12.3.1 Selecting
V
tt
and
V
term
Generally in CMOS systems, the driver switches “rail-to-rail”: the output swings
between
V
dd
and ground. In these systems the receiver switch point is set by a termi-
nation voltage (
V
tt
in Figure 12.3) to be half the value of
V
dd
(
V
), since this cre-
dd
2
ates symmetrical low and high noise margins. For instance, 120
Ω
resistors would
V
be used for
R
1 and
R
2 to terminate a 60
Ω
transmission line at
. Assuming
V
dd
dd
2
is 2.5V, this gives a 60
1.25V.
However, depending on the switching technology, half of
V
dd
is not always the
most appropriate value for
V
tt
. For instance, in TTL signaling (originally imple-
mented with bipolar technology but now largely done with CMOS or BiCMOS), a
logic low is sensed with a voltage close to ground and a high with a voltage nearly
equal to half of
V
dd
. As explored in the Problems, in this situation the termination
voltage is shifted to be midway between the two logic values.
The voltage for
V
term
must be chosen carefully when working with three-
state buses (that is, a multidrop bus where the transmitters can be placed in a
Ω
termination centered at
V
tt
=
