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Fig. 6.19
SAD operation using MX core
Speed Performance
Case A
220.1 msec
10.8 times faster
Case B
20.4 msec
@Freq. 648MHz(CPU), 324MHz(MX-2), per 1 frame
Case A
CPU#1: Event Detection
Object Map Creation
Motion Vector Extraction
Case B
CPU#1: Event Detection
CPU#0: Object Map Creation
MX-2: Motion Vector Extraction
CPU#0:
Fig. 6.20
Performance evaluation
were obtained under the conditions where one image frame was processed at an
operating frequency of 648 MHz in each CPU and 324 MHz in the MX-2. About the
speed performance, the proposed system exhibits the 20.4-ms processing time that
is 10.8 times faster than the CPU-only configuration. As shown here, high-
performance image recognition applications can be achieved by implementing the
heterogeneous architecture with the MX core and the CPU cores.
6.3
Applications on SMP Linux
Three Linux applications running on the RP-1, RP-2, and RP-X multicore chips (as
described in Chap. 4) have been developed. The first application program visualizes
the load balancing mechanism of Linux on the RP-1, which has four CPU cores
with the cache coherency protocol among them. A monolithic Linux kernel runs on
the four cores, and the load balancer of Linux balances the loads among the cores.
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