Hardware Reference
In-Depth Information
cannot handle physical addresses over 32 bits (Linux HIGHMEM allocates a physical
address for DMA access over 32 bits). This limitation is not RP-X specific, but the
same issue will occur when supporting some PCI or PCI-Express devices which are
limited to less than 32-bit DMA addressing [ 10 ] .
Domain-Partitioning System
The application fields of embedded systems are rapidly expanding, and the func-
tionality and complexity of these systems are increasing dramatically [ 11 ] . Today's
embedded systems require not only real-time control functions of traditional embed-
ded systems but also IT functions, such as multimedia computing, multiband net-
work connectivity, and extensive processing for database transactions. Facilitating
embedded systems' many requirements calls for new system architectures.
One approach for designing system architectures is to integrate multiple operat-
ing systems on a multicore processor. In this approach,
Heterogeneous operating systems run different types of applications within the
multicore processor.
A real-time operating system delivers real-time behavior such as low latency and
predictable control function performance.
A versatile operating system processes applications developed for IT systems.
However, this system architecture has a drawback. An unintentional failure of one
operating system could overwrite important data and codes and bring down not only
that operating system but others as well. This can occur because a CPU core, which
executes operating system codes, can access any hardware resource on a multicore
processor. We therefore need a partitioning mechanism to isolate any unintentional
operating system failure within a domain to prevent it from affecting systems in other
domains. A domain is a virtual resource-management entity that executes operating
system codes in a multi-operating system integrated on a multicore processor.
System engineers have developed several partitioning mechanisms for servers
and high-end desktop systems [ 12, 13 ]. However, these mechanisms are unsuitable
for an embedded multicore processor equipped with only the minimally required
resources. Rather, they are for multiprocessor systems in which many processors
share large amounts of memory and I/O devices. The mechanisms cannot divide a
small memory system into areas nor segment a device into groups of channels to be
assigned to multidomains on the multicore processor. We have therefore developed
a low-overhead domain-partitioning mechanism for a multidomain embedded sys-
tem architecture that protects a domain from being affected by other domains on an
embedded multicore processor. Additionally, we fabricated a multicore processor
that incorporates a physical partitioning controller (PPC), which is a hardware sup-
port for the domain-partitioning mechanism.
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