Software Environments - Heterogeneous Multicore Processor Technologies for Embedded Systems - page 156

Fig. 5.1 Structure of idle reduction
framework

Idle Reduction

(1) (2)

User Space

Kernel Space

procfs sysfs

(3) (4)

CPU
Hot-plug

CPUfreq
(userspace gov.)

CPU
Hot Remove

CPU
Hot Add

CPU Frequency
change

Table 5.8 Components of idle reduc tion framework
Components Details

Idle reduction Power-saving manager

procfs File system to get kernel status

sysfs File system to set kernel parameters

CPU hot-plug Framework for core hot-plug control

CPU hot add Power on control of each core (architecture-dependent part)

CPU hot remove Power off control of each core (architecture-dependent part)

CPUfreq (userspace) Framework for CPU frequency control

CPU frequency change Frequency control of each core (architecture-dependent part)

Table 5.9 CPUfreq governors

Governor Details

On demand Controls core frequency to adapt it to each core's load

Conservative Same as on demand, but controls core frequency

conservatively

Powersave Uses minimum core frequency at all times

Performance Uses maximum core frequency at all times

Userspace Controls core frequency by user commands

Figure 5.1 shows the major components of idle reduction that reduce power con-
sumption coordinately using CPUfreq and CPU hot-plug. CPUfreq can be con-
trolled by userspace governors. The available governors are listed in Table 5.9 .
An example of idle reduction is as follows. If the multicore chip has no execution
load, idle reduction forces CPU hot remove on all cores except for the primary core
and drops the primary core frequency to minimum automatically. After that, if two
threads are runnable, idle reduction forces CPU hot add on a core (two cores are
alive) and ups core frequencies step by step.

5.1.2.3 Evaluation

An evaluation was done using the following steps: first, we evaluated the instanta-
neous power consumption of CPU hot-plug and CPUfreq, and second, we evaluated