Biomedical Engineering Reference
In-Depth Information
The fundamental difference between CCD and CMOS is that pixel level signal process-
ing is now possible. The CMOS sensing element consists of two key components: the pho-
todiode that produces a small photocurrent proportional to the incident light and an
amplifier to boost the signal. Early sensors suffer from significant noise, but steady
advances in signal processing have dramatically improved image quality. Although pixel
readout can be accomplished using multiple channels, sequential scanning is still much
more effective. Instead of using shift registers to read pixels in a sequential fashion, two
decoders in the X and Y axes can be used to provide random-access readout from indi-
vidual pixels (73). Other supporting circuitry can potentially be integrated into a single
chip, such as image stabilization and image compression.
Conventional photoreceptor arrays only capture images, and processing is accom-
plished by general-purpose computers.In contrast the image capture layers of biological
vision systems are in close interaction with subsequent processing stages in the neural
pathways. Vision chips are developed to mimic this interaction by integrating both stages
on the same chip and performing signal processing at the pixel level (51). Data compres-
sion is also possible at the pixel level, increasing the effective bandwidth during trans-
mission. The sum of these capabilities makes vision chips much faster than conventional
CMOS systems.
17.3.3.2 Circuit Architecture for Bacteriorhodopsin-Based Photoreceptor Array
A hybrid architecture is applied to the flexible bR photoreceptor array design. The signal
processing electronics are separated from the bR sensor array due to differing fabrication
methods. Active circuitry is applied to each individual pixel, where it has its own front-
end processing stage. As discussed in Section 17.3.2, the switched integrator is used as a
preamplifier for a single pixel and it converts the weak photoinduced current into a meas-
urable voltage. In addition to amplification, other functions like spatial and temporal sig-
nal processing are required at the pixel level to benefit high-level imaging applications. In
vision chips, such functions have been achieved by integrating filtering components
within each pixel. However, by applying bR-based photoreceptor, similar functions can be
accomplished at the material level without the need for extra circuitry. When exposed to
light, a bR photoreceptor readily demonstrates differential temporal filtering inherent in
its photoresponse. This feature can be exploited to assist high-level vision tasks, such as
motion detection, edge detection, and contrast enhancement.
For this work, a multichannel readout approach is used to transfer the information
processed by each pixel to the processing circuitry. This greatly simplifies array fabrica-
tion, since no shift registers need to be considered at this time. It has been shown that bR
photoreceptors can be manufactured into 256-pixel arrays on glass substrates, using a
multichannel readout scheme (39). The multichannel design reduces the information to be
transferred and increases the transfer bandwidth. Depending on the intended application,
this approach also allows additional per-pixel and array-level signal processing prior to
transmitting the image data to the external application.
In this prototype design, the bR photosensor and its processing circuitry are physically
separated. The sensor array is deposited on an ITO-patterned PET film. The processing
circuitry is fabricated on a standard PCB circuit board using discrete surface-mount com-
ponents. Even though the design in this manner has limitations (i.e., moderate noises and
large physical size), from a system design perspective, the hybrid architecture itself does
have a great potential for imaging applications. Several advantages of applying such
architecture include increased density, higher fill factor, and the ability to independently
optimize the sensor array and processing circuits. As the processing circuitry within each
pixel become increasingly large and complex, limitations of a planar 2D architecture
