Information Technology Reference
In-Depth Information
Only one active CPU is required to allow use of all of the memory and I/O in
the XSB.
If service is required, only one domain is affected.
For environments requiring that no failure affect more than one domain, placing
system boards in Uni-XSB is the preferred mode. In general, the number of domains
possible is half of what would be possible for each system. For example, a CMU/IOU
board set on the M8000/M9000 could support four domains, because there are four
PCIe switches on the IOU. Ensuring redundancy across two PCIe switches reduces
the maximum number of domains on a single CMU/IOU board set to two. Such a
decision reflects a trade-off between domain isolation and domain density.
When a system board or CMU is placed in Uni-XSB mode, it is identified as
XSB xx -0, where xx is the board slot position. On the M4000, there is only one
system board, so it is identified as XSB00-0. On the M5000, there are two system
boards, so they are identified as XSB00-0 and XSB01-0. On the M8000/M9000,
the physical slot positions determine the XSB numbers: CMU#0 is identified as
XSB00-0, CMU#1 is identified as XSB01-0, and so on.
2.2.1.2 Quad-XSB
Although a PSB configured into Quad-XSB mode can have all four XSBs in differ-
ent domains, the SC chip continues to fully enforce data packet isolation between
CPUs and memory on the same CMU. Figures 2.6 and 2.7 show a single PSB
configured in Quad-XSB mode for the M4000/M5000 and M8000/M9000, respec-
tively. Each Quad-XSB is completely independent from the other Quad-XSBs on
the same PSB. This SC strictly enforces this isolation.
When a system board or CMU is placed in Quad-XSB mode, it is identified as
XSB xx -0 to XSB00-3, where xx is the board slot position. On the M4000, there is
only one system board, so it is identified as XSB00-0 to XSB00-3. On the M5000,
there are two system boards, so they are identified as XSB00-0 to XSB00-3 and
XSB01-0 to XSB01-3. On the M8000/M9000, the physical slot positions determine
the XSB numbers: CMU#0 is identified as XSB00-0 to XSB00-3, CMU#1 is identi-
fied as XSB01-0 to XSB01-3, and so on.
For the XSB configurations on the M4000/M5000, only the first and second XSBs
can be used to host domains, as only they have IO channels, or PCIe switches. The
other two XSBs (third and fourth) can be added to only those domains that have
at least one of the first two XSBs. The Quad-XSB configurations on the M8000/
M9000 are more flexible because each Quad-XSB has a PCIe switch and, there-
fore, can be host to a domain. Quad 00-0 has the PCI-X slot, two PCIe slots, the
DVD drive, and two internal disk drives. Quad 00-1 has just two PCIe slots.
 
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