Realisation of Digital Filters - Digital Signal Processing: A Practitioner's Approach - page 114

5.7 Frequency Estimator on the DSP5630X
A DSP algorithm implementation on a processor in real time involves three distinct
steps:

1. Rapid prototyping using MATLAB or any other higher-level language
2. Translation to ANSI C and testing the same
3. Using a cross compiler to download the code on to the DSP processor

We have implemented this methodology (Figure 5.12) on a DSP5630X processor.
Approximately 40% of total development time is invested on algorithm develop-
ment and 30% is for testing the algorithm.

Figure 5.12 Algorithm to hardware

5.7.1 Modified Response Error Method
In the modified response error method [3], the signal y k is modelled as an output of
an oscillator corrupted by a narrowband noise k and WGN k . So the modelled

signal y k can be written as

^

y k ¼ sin ð 2 ½ fk Þþ k þ k : ð 5 : 37 Þ

^

The quantity sin ð 2 fk Þ in (5.37) can be modelled as an output of an autoregressive

second-order system, AR(2), with poles on the unit circle, and is given by

x k ¼ a 1 ^ x k 1 þ a 2 ^ x k 2 ; ð 5 : 38 Þ

^ ^ ^

where Þ and

a 2 ¼ r 2 where re j are the complex conjugate poles. A distinct peak exists
[8] at

a 1 ¼ 2 cos ð

! Þ and

a 2 ¼ 1. However,

in general a 1 ¼ 2r cos ð

! p , which is given by

25a 1 1 þ 1
a 2

! p ¼ cos 1

0 : : ð 5 : 39 Þ