Biomedical Engineering Reference
In-Depth Information
technology promises to significantly enhance signal processing systems and
provide relief from pinout, physical proximity, and clocking problems [54].
Furthermore, by releasing the bandwidth constraints imposed by electrical
interconnects, the full processing capability of LSI chips could be exploited
to improve currently fielded systems. Practical interconnection at the intra-
board, backplane, and cabinet levels of signal processor system can now be
realized with optical interconnects.
Faster logic switching times and increased use of very large-scale inte-
gration technology are placing new demands on digital system intercon-
nections. In particular, board and backplane interconnect designs for future
systems must satisfy requirements for increased density and improve elec-
trical performance with respect to transmission of high-frequency signals.
System parameters such as rise time, impedance level, and the assignment
of ground return paths will have a significant effect on the high-frequency
performance of electrical interconnections.
In order to realize the potential of the new families of fast switching com-
ponents, there is an increasing need for system electrical interconnections to
be designed as networks of transmission lines. Logic switching times con-
tinue to decrease at a much faster rate than the length of typical interconnec-
tions on the board or backplane level [55].
Interconnects may be classified by three categories according to their
system-level utilization. These categories may be termed intraboard, back-
plane, and cabinet levels. The primary distinguishing characteristic of these
categories is the interconnect length. Definitions of these lengths, albeit
somewhat arbitrary ones, can be made. Intraboard level interconnects are
approximately 5-15 cm long. Backplane level interconnects may run from 15
to 40 cm, while the longest interconnects are at the cabinet level and are typi-
cally on the order of meters.
2.5.2 Link Design and Packaging
The very large number of signal connections that must be made to densely
integrated chips creates a very high density of separate conductors on the
printed circuit boards. Multilayer boards relieve coupling and crossover
problems by allowing crossovers to occur in different layers. These boards
may be assembled as multilayered, multichip carriers that also contain met-
alized “vias” for vertical signal conduction. The number of chips and the
dimensional extent of the modules is limited by the capacitance load that
the chip is capable of driving without excess deterioration of rise time and/
or propagation delay. The use of special drivers or terminated transmission
lines is not anticipated for these short internal connections.
One the other hand, the multilayer board structure does allow signal
paths to be implemented in an approximation to the balanced stripline or the
microstrip geometry; therefore, multilayer boards will permit terminated
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