Digital Signal Processing Reference
In-Depth Information
Fixed-Point Considerations
The C6713 is a floating-point processor capable of performing both integer and
floating-point operations. Both the C6713 and the A1C23 codec support 2's-
complement arithmetic. It is thus appropriate here to review some fixed-point
concepts [1].
In a fixed-point processor, numbers are represented in integer format. In a
floating-point processor, both fixed- and floating-point arithmetic can be handled.
With the floating-point processor C6713, a much greater range of numbers can be
represented than with a fixed-point processor.
The dynamic range of an
N
-bit number based on 2's-complement representation
is between
-
(2
N
-1
) and (2
N
-1
-
1), or between
-
32,768 and 32,767 for a 16-bit system.
By normalizing the dynamic range between
-
1 and 1, the range will have 2
N
sec-
tions, where 2
-(
N
-1)
is the size of each section starting at
-
1 up to 1
-
2
-(
N
-1)
. For a
4-bit system, there would be 16 sections, each of size
8
from
-
1 to
8
.
C.1 BINARY AND TWO'S-COMPLEMENT REPRESENTATION
To make illustrations more manageable, a 4-bit system is used rather than a 32-bit
word length. A 4-bit word can represent the unsigned numbers 0 through 15, as
shown in Table C.1.
The 4-bit unsigned numbers represent a modulo (mod) 16 system. If 1 is added
to the largest number (15), the operation wraps around to give 0 as the answer.
Finite bit systems have the same modulo properties as number wheels on com-
bination locks. Therefore, a number wheel graphically demonstrates the addition
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