DSP Applications and Student Projects - Digital Signal Processing and Applications with the C6713 and C6416 DSK - page 401

Implementation Issues
Each input sample was parsed into four levels. Each level was sent to the output of
the codec 12 times (for an acceptable square wave). As a result, for each input
sample there are 48 output samples (4

12). The output sample rate is 48 times the
input sample rate (using down-sampling). For the PSK cases, the output waveform
is a four-sample sinusoid with different phases. Each input sample is parsed into
symbols, and each symbol is sent to the output of the codec four times. For BPSK,
the symbol is 1 bit with an output-to-input ratio of 64 (4

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symbol consists of 2 bits with a ratio of 32 (4 8).

For the PAM cases, a square wave pulse was chosen and implemented by out-
putting the level 12 times. For BPSK and QPSK, the output was a sinusoid com-
posed of four output samples with different phases (to represent the sinusoid
appropriately). It is more efficient than the PAM case.
Transmitting from one DSK and receiving from another DSK involves synchro-
nization issues that requires symbol clock recovery and an adaptive equalizer (using
a PLL).

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10.14 SELECTABLE IIR FILTER AND SCRAMBLING SCHEME USING
ONBOARD SWITCHES

This mini-project implements one of several IIR filters using the onboard DIP
switches to select a specific filter type. Furthermore, one of the switch options imple-
ments a scrambling scheme with voice as input. With the DSK output of the voice
scrambler as the input to a second DSK to unscramble, the original voice signal can
be recovered.
Four 10th-order IIR Butterworth filters of varying bandwidths are designed using
MATLAB's SPTool described in Appendix D (utilized for FIR and IIR filter designs
in Chapters 4 and 5). Table 10.8 shows the assignments of the DIP switches and the
corresponding implementations. A “1” represents a switch in the up position, while
a “0” represents a switch in the down or pressed position. For example, the switch
combinations of “0011” (binary 3) and 0101 (binary 5) select a 3-kHz lowpass IIR
filter and a voice scrambling scheme, respectively, for implementation.

TABLE 10.8 Dip Switch Assignments and Corresponding Implementations

Dip Switch Combination Type f c or Bandwidth

0000 Original signal N/A

0001 Lowpass 2 kHz

0010 Highpass 2 kHz

0011 Lowpass 3 kHz

0100 Bandpass 1.5-3 kHz

0101 Voice scrambler N/A

0110-1111 No output N/A