Architecture and Instruction Set of the C6x Processor - Digital Signal Processing and Applications with the C6713 and C6416 DSK - page 84

3.8 TMS320C6x INSTRUCTION SET
3.8.1 Assembly Code Format
An assembly code format is represented by the field
Label || [ ] Instruction Unit Operands ;comments
A label, if present, represents a specific address or memory location that contains
an instruction or data. The label must be in the first column. The parallel bars (||)
are there if the instruction is being executed in parallel with the previous instruc-
tion. The subsequent field is optional to make the associated instruction conditional.
Five of the registers—A1, A2, B0, B1, and B2—are available to use as conditional
registers. For example, [A2] specifies that the associated instruction executes if A2
is not zero. On the other hand, with [!A2], the associated instruction executes if A2
is zero. All C6x instructions can be made conditional with the registers A1, A2, B0,
B1, and B2 by determining when the conditional register is zero. The instruction
field can be either an assembler directive or a mnemonic. An assembler directive is
a command for the assembler. For example,
.word value
reserves 32 bits in memory and fill with the specified value . A mnemonic is an
actual instruction that executes at run time. The instruction (mnemonic or assem-
bler directive) cannot start in column 1. The Unit field, which can be one of the
eight CPU units, is optional. Comments starting in column 1 can begin with either
an asterisk or a semicolon, whereas comments starting in any other columns must
begin with a semicolon.
Code for the floating-point processors C3x/C4x is not compatible with code
for the fixed-point processors C1x, C2x, and C5x/C54x. However, the code for the
fixed-point processors C62x is compatible with the code for the floating-point C67x.
C62x code is actually a subset of C67x code. Additional instructions to handle
double-precision and floating-point operations are available only on the C67x
processor. Also, some additional instructions are available only on the fixed-point
C64x processor.
Several code segments are presented to illustrate the C6x instruction set. Assem-
bly code for the C6x processors is very similar to C3x/C4x code. Single-task types
of instructions available for the C6x make it easier to program than either the pre-
vious generation of fixed- or floating-point processors. This contributes to an effi-
cient compiler. Additional instructions available on the C64x (but not on the C62x)
resemble the multitask types of instructions for C3x/C4x processors. It is very
instructive to read the comments in the programs discussed in this topic. Appendix
A contains a list of the instructions for the C62x/C67x processors.