Shift Registers - Exploring Arduino: Tools and Techniques for Engineering Wizardry - page 149

■ VCC will connect to 5V.
■ GND will connect to a shared ground with the Arduino.
■ The SER pin is represented by the DATA input in Figure 7-1. This is the
pin where you will feed in 8 sequential bit values to set the values of the
parallel outputs.
■ The SRCLK pin is represented by the CLOCK pin in Figure 7-1. Every
time this pin goes high, the values in the shift register shift by 1 bit. It
will be pulsed eight times to pull in all the data that you are sending on
the data pin.
■ The RCLK pin is represented by the LATCH pin in Figure 7-1. Also known
as the register clock pin , the latch pin is used to “commit” your recently
shifted serial values to the parallel outputs all at once. This pin allows
you to sequentially shift data into the chip and have all the values show
up on the parallel outputs at the same time.
You will not be using the SRCLR or OE pins in these examples, but you
mig ht w ant to use them for your project, so it's worth understanding what they
do. OE stands for output enable. The bar over the pin name indicates that it is
active low. In other words, when the pin is held low, the output will be enabled.
When it is held high, the output will be disabled. In these examples, this pin
will be connected directly to ground, so that the parallel outputs are always
enabled. You could alternatively connect this to an I/O pin of the Arduino to
simultaneously turn all the LEDs on or off. The SRCLR pin is the serial clear
pin. When pulled low, it empties the contents of the shift register. For your
purposes in this chapter, you tie it directly to 5V to prevent the shift register
values from being cleared.
Understanding How the Shift Register Works
The shift register is a synchronous device; it only acts on the rising edge of
the clock signal. Every time the clock signal transitions from low to high, all
the values currently stored in the eight output registers are shifted over one
position. (The last one is either discarded or output on the Q H ' pin if you are
cascading registers.) Simultaneously, the value currently on the DATA input
is shifted into the first position. By doing this eight times, the present values
are shifted out and the new values are shifted into the register. The LATCH
pin is set high at the end of this cycle to make the newly shifted values appear
on the outputs. The flowchart shown in Figure 7-3 further illustrates this