DSP Instruction Set Simulation - Signal Processing Systems - page 933

For a real machine, one usually cannot perform such a simple translation. In
particular, it may be impossible to identify which locations in the guest computer's
memory hold instructions and which hold data. Even if the guest computer's address
space has been divided up into a text region (which holds instructions) and a data
region, it is still quite possible that the text region holds some data (especially read-
only data). If the guest computer code is self-modifying code , there is a bigger
problem because the TCODE array may lose its correspondence with the instructions
in the guest computer's memory.

2.3 Interpreter Optimizations

Particular combinations of instructions tend to recur in assembler code. An in-
terpreter can take advantage of this by creating new instructions which combine
frequently occurring n-tuples of instructions into single superinstructions which are
also known as superoperators [ 53 ] . If the n-tuples have a high static frequency of
occurrence, the memory footprint of the program is reduced. If they have a high
dynamic frequency, the interpretation speed is increased. Ideally, we can find n-
tuples which have both high static and dynamic frequencies.
The improved interpretation speed is obtained because (a) there are fewer
fetch-decode-execute cycles being performed, and (b) the combined actions of the
opcodes involved in the n-tuple can be simplified. For example, if the two MIPS
instructions:

addi $3,$2,4
add $3,$3,$3
are combined into a single instruction NewOp1 $3,$2,4 then the intermediate
update of register 3 can be eliminated as unnecessary.
If a threaded code interpreter is in use, there is effectively no limit to the number
of superoperator combinations which can be supported. There is a trade-off between
the memory footprint of the interpreter and interpretation speed.

3 Compiled Simulation

Interpretive simulation is quite slow. Unnecessary operations like instruction decod-
ing and all details of instruction fetch are repeated again and again. These details
can be optimized away with compiled simulation. The idea of compiled simulation
is to take an application program (usually represented in assembly language source
form or as a binary file) and generate a specialized simulator which executes just
this one application. This technique is due to Mills et al. [ 45 ] .