DSP Instruction Set Simulation - Signal Processing Systems - page 927

DSP Instruction Set Simulation

Florian Brandner, Nigel Horspool, and Andreas Krall

Abstract An instruction set simulator is an important tool for system architects
and for software developers. However, when implementing a simulator, there are
many choices which can be made and that have an effect on the speed and the
accuracy of the simulation. They are especially relevant to DSP simulation. This
chapter explains the different strategies for implementing a simulator.

1 Introduction

The instruction set architecture (ISA) of a computer comprises a complete definition
of the instructions, the way those instruction are represented by bit patterns in
the computer memory, and the semantics of each instruction when executed. An
ISA is normally implemented by the physical hardware of the computer, using
hardware resources such as the register file, the arithmetic and logic unit, the
bus, and so on. However it is equally possible for the ISA to be implemented
entirely in software. In this situation, we are using the computer which runs the
software (the host computer ) to emulate the ISA of a different computer (the
guest computer ). The software application which implements the ISA is commonly
known as an instruction set simulator [ 66 , Chap. 2]. It should be noted that some

F. Brandner ( )
Department of Applied Mathematics and Computer Science,
Technical University of Denmark, Kongens Lyngby, Denmark
e-mail: [e-mail]
N. Horspool
Department of Computer Science, University of Victoria, Victoria, BC, Canada
e-mail: [e-mail]
A. Krall
Institut fur Computersprachen, Technische Universitat Wien, Vienna, Austria
e-mail: [e-mail]