Methods and Tools for Mapping Process Networks onto Multi-Processor Systems-On-Chip - Signal Processing Systems - page 866

Fig. 6 Mapping of a Kahn process network onto a two-processors architecture and an example of
a corresponding mapping XML file

which is specified in XML, similar to the application model. This XML architecture
representation is not specific to DOL, but also encountered in other frameworks,
such as Artemis and MAMPS.
The application model is brought in correspondence to the architecture model by
a mapping (see Fig. 6 ) which can be either established manually by an experienced
designer or generated automatically by design space exploration. This mapping
fixes the allocation of hardware resources, the binding of the application elements
onto these resources, and the scheduling on shared resources. For the mapping
specification, once more, the XML format is used. The mapping XML serves as
intermediate format and interface between tools, i.e. the design space exploration
tool generates a mapping XML as an output, which is the input for the software
synthesis tool.
The application XML, the architecture XML, and the mapping XML are the
basis for the following DOL synthesis steps, i.e. for the functional simulation and
the implementation of the final MPSoC, but also for the generation of the analytic
performance analysis model (see Fig. 4 ) .

4.3 System Synthesis

Similar to other frameworks, an application specified in DOL cannot be directly
executed by just compiling the provided source code of the processes. A synthesis
step is required that generates the “glue code” implementing the processes and
channels, the bootstrapping and the scheduling of the application. Specifically,
synthesis is done first for a standard PC/workstation to support the functional