Digital Signal Processing Reference
In-Depth Information
design space exploration
application
specification
(XML & C)
mapping
specification
(XML)
architecture
specification
(XML)
functional
simulation
generation
analysis
model
generation
system
synthesis
simulation on
virtual platform /
execution on
physical platform
simulation on
workstation
evaluation on
workstation
Fig. 4
Overview of the DOL design flow
compilation, and the linking to platform specific libraries as well as to the run-time
environment. Generated binaries can either be executed on a simulator of the target
platform or on the real MPSoC. Both, the functional and the low-level simulation
provide performance figures that will enrich the application specification. This
information will be used in later phases for the calibration of the analysis model.
The design flow described so far is typical for MPSoC design and very similar
to the other design flows listed in Table
1
and explained in the previous chapters.
What is different in DOL is its focus on the design and analysis of real-time
signal processing applications. To this end, an analytic worst-/best-case performance
analysis method has been embedded into the design flow. Besides enabling the
analysis of real-time systems, using an analytic method for performance analysis
facilitates rapid design space exploration due to short analysis times. The resulting
performance data are embedded in a design space exploration loop in search of the
optimal mapping.
4.2
System Specification
For designing the specification format of an MPSoC, one has to consider three
criteria. First, the specification format should be expressive enough to represent
the class of envisioned applications, i.e. (real-time) signal processing applications.
Second, the specification should facilitate automation of system synthesis and
analysis. The third criterion is the possibility of mapping an application in different
ways onto an architecture. In the DOL framework, these criteria are met by
