Digital Signal Processing Reference
In-Depth Information
x
max
= 0.875
0.750
0.625
0.500
0.375
0.250
0.125
-0.125
-0.125
-0.375
-0.500
-0.625
-0.750
-0.875
x
min
= -1.000
Fig. 5
Saturation arithmetic with 4-bit fractional representation (sign bit and three fraction bits),
thin dashed line
: full precision signal,
thick dashed line
: quantized overflown signal,
solid line
:
quantized signal with saturation,
x
min
(
x
max
): minimum (maximum) representable number
3.2
Floating-Point Data Paths
The first floating-point DSP processors used proprietary number representations. In
arithmetic compatible with IEEE standard was introduced especially in general-
purpose microprocessors. In modern floating-point DSP processors, the arithmetic
units exploit IEEE standard.
In a floating-point arithmetic unit, the results are scaled automatically to maxi-
mize the precision of results as the number representation requires normalization
of mantissa. This normalization results in the main advantage of floating-point
representation: large dynamic range. For example, IEEE single-precision format
defines 24-bit mantissa and 8-bit exponent where the minimum and maximum
values for exponent are
126 and 127, respectively. Therefore, the dynamic range
of the IEEE single-precision number system is
−
2
2
−
23
2
127
−
×
10
76
;20log
10
(
10
76
D
sp
=
=
2
.
89
×
2
.
89
×
)
dB
≈
1529 dB
.
2
−
126
1
×
