Digital Signal Processing Reference
In-Depth Information
0
1
2
3
4
5
6
7
Rotate
±
1 bits
0
7
1
6
2
0
1
2
3
4
5
6
7
Rotate
±
2 bits
5
3
4
0
1
2
3
4
5
6
7
Rotate
±
4 bits
Fig. 4
Barrel shifter
Another use for shifters is scaling of operands from memory. When full precision
products from fractional operands are used, the position of binary point in the
extended precision result in accumulator is not the same as in the operands in the
memory. For example, the
b
-bit operands in memory use representation with
b
1
fractional bits, while full precision product in accumulators use representation with
2
b
−
2 fractional bits. Therefore, if we would like to add an operand from memory to
the full precision result in the accumulator, the memory operand has to be multiplied
by 2
(
b
−
1
)
, i.e., shifted
−
bits to the left. Such an shift can be carried out with the
from instructions need to be shifted to the left and for this purpose, immediate field
from program bus in DSP56300 in Fig.
2
has connection to the bit field unit & barrel
shifter.
Finally, shifters are also exploited when storing extended precision results from
wide accumulators or registers to native word width memory. This implies that a
part of the bits need to be selected to be transferred to memory. For this purpose,
the contents of the accumulator or register can be shifted such that the bits to be
stored are in the LSB or MSB part and then stored to memory. For example, 16-bit
operands with 15 fractional bits will produce a 32-bit full precision result with 30
fractional bits in the accumulator, thus the result should be shifted 15 bits to the
right such that the 16 least significant bits can be stored to memory in the same
representation as the original operands. Alternatively, if the 32-bit accumulator can
be used as two 16-bit registers (upper and lower half), the product can be shifted
one bit to the left and the upper half is stored to memory.
The shifters in DSP processors need to support shifts of variable number of bits
in a single cycle unlike in low-cost microprocessors where shifts and rotations of
only one bit to the left or right are typically supported. Therefore, DSP processors
use barrel shifters (also known as plus-minus-2
i
(PM2I) networks), which contains
register in 2
n
-bit barrel shifter is connected to registers, which are at distances
±
(
b
−
1
)
2
0
2
1
2
(
n
−
1
)
,±
,...,±
indicating that a shift of an arbitrary number of bits will
take at most
steps. This is illustrated in Fig.
4
where connections in an 8-
bit barrel shift can be seen, i.e., each bit register has connections to five neighbors.
The three different connection layers are shown in the right and it can be seen that
any arbitrary shift will take at most two steps. Barrel shifters are implemented as
(
n
−
1
)
