Digital Signal Processing Reference
In-Depth Information
A new trend in DSP systems is to use GPGPU for signal processing. GPGPU
stands for General-Purpose computation on Graphics Processing Units. Graphics
Processing Units (GPUs) are high-performance many-core processors that can be
demonstrated a GPU-based high speed LDPC decoder implementation. Authors
LTE Turbo decoder using GPU.
4
Further Reading
This chapter serves as a brief introduction to the application-specific accelerators
for communications. For more detailed discussion on the VLSI signal processing
system design and implementation, readers are encouraged to read the following
hardware accelerators for 3G/4G wireless systems, one can read the following dis-
Analog Devices, and Freescale provide many application notes about their DSP
Readers are also advised to look at several other chapters of this handbook. For
introduces the application-specific instruction set DSP processors, and Zhang et
Acknowledgements
The authors at Rice University would like to thank Nokia, Nokia Siemens
Networks (NSN), Xilinx, and US National Science Foundation (under grants CCF-0541363, CNS-
0551692, CNS-0619767, EECS-0925942 and CNS-0923479) for their support of this work.
References
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Journal on Selected Areas in Communications
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(8), 1451-1458 (1998)
2. Amiri, K., Cavallaro, J.R.: FPGA implementation of dynamic threshold sphere detection for
MIMO systems. In: IEEE Asilomar Conf. on Signals, Syst. and Computers, pp. 94-98 (2006)
3. Analog Devices: The SHARC processor family.
4. Bahl, L., Cocke, J., Jelinek, F., Raviv, J.: Optimal decoding of linear codes for minimizing
symbol error rate. IEEE Transactions on Information Theory
IT-20
, 284-287 (1974)
5. Bass, B.: A low-power, high-performance, 1024-point FFT processor. IEEE Journal of Solid-
State Circuits
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(3), 380-387 (1999)
6. Berrou, C., Glavieux, A., Thitimajshima, P.: Near Shannon limit error-correcting coding and
decoding: Turbo-codes. In: IEEE Int. Conf. on Commun., pp. 1064-1070 (1993)