Digital Signal Processing Reference
In-Depth Information
Digital
frontend
filters
Forward
error
correction
Symbol
processor
Micro
controller
Application
Processor
ABB
DBB
RF
MCU
Peripheral, Bus and memory subsystem
Fig. 15
A digital baseband DBB in a radio system
with each other. Signals arriving to the antenna at different times induce time
domain distortion. Signals carried by different frequencies induce frequency domain
distortion. Distortions and interferences must be cancelled before signal detection,
which requires a pair of channel estimator and equalizer to remove the noise and
distortions. Relative movement of a radio receiver and its transmitter changes the
relative positions between the transmitter and the receiver. An estimated channel
will not be valid as soon as the relative position is changed. If the mobility is high
(e.g. a moving vehicle), the life time of a channel model will be on millisecond level,
requiring recalculation of the channel in a millisecond.
To guard against glitches and white noise, forward error correction (FEC) algo-
rithms must be executed. Computing features of advanced forward error correction
algorithms include high computing load, computing based on short data precision,
advanced addressing algorithms for parallel data access, and feasibilities for data
and task level parallelization.
All these computing tasks, filtering signals, signal synchronizer, channel esti-
mator, channel equalizer, signal detector, forward error correction, signal coding,
and symbol shaping, need heavy computing. Moreover, radio baseband signal
processing must conducted in real-time. A mobile channel should be estimated
and updated within milliseconds, and all other signal processing for a receiver and
transmitter must be done in each symbol period. For example, the symbol period of
IEEE 802.11a/g/n is 4
μ
s, so several billions of arithmetic operations per second are
Some tasks have heavy requirements on computing performance and low
requirements on flexibility, such as simple filtering, packet detection, and sampling
rate adaptation. These tasks can be allocated to the DFE (digital frontend) module.
Functions of these filters do not change in each clock cycle, thus configurability
is sufficient for complexity handling of DFE. In the same way, error correction
computing under acceptable low data precision can be allocated to FEC (forward
error correction) modules without requiring programmability.
