Application Specific Instruction Set DSP Processors - Signal Processing Systems - page 668

Distributed
multi
processors

Programmable
slave machine

FSM driven
datapath

Function
solver

Autonomy level

Fig. 6 Possible custom architectures

Except for data flow machines, there are other kinds of custom architectures.
A function solver can be a part of datapath in an ASIP. It is a simple hardware
module directly controlled by the control path of the processor. A typical function
solver carries a single function such as 1/x, square root, functional module for
complex data processing etc. It is usually driven by an I/O instruction or an
accelerated instruction. The autonomy level of a function solver is low.
A FSM driven datapath usually offers autonomous execution of a single al-
gorithm. The execution might be triggered by arriving data or by the master
machine. This architecture is typically used to process functions requiring ultra high
performance, or functions relatively independent of the master machine.
A programmable slave machine is controlled by a local programmable control
path, and the autonomy level is rather high. However, task execution in a pro-
grammable slave machine is controlled by the master processor. A programmable
slave machine is usually an ASIP. SIMD is a typical programmable slave machine.
Finally, a distributed system could be based on distributed ASIP processors. In
this system, no one is assigned as master and no one is principally a slave. Each
machine runs its own task and communications between tasks are based on message
passing.
A FSM driven datapath in Fig. 7 could be a task flow machine. The task flow
architecture is a typical custom architecture. It is also called function mapping
hardware or algorithm mapping architecture. The architecture is the direct im-
plementation of a DSP control flow graph. In Fig. 7 , the method of hardware
implementation of a control flow graph is depicted.
The left part in Fig. 7 is the behavioral task control flow graph of the DSP
application. If the control flow graph is relatively simple and will not be changed
through the life time of the product, the control flow graph on the left part of Fig. 7
can be implemented using HW on the right part of Fig. 7 b . In Fig. 7 b , the datapath
is the mapping of the control flow graph in Fig. 7 a . The FSM controls the execution
of the DSP task in each hardware block step by step. Memories are used as the
computing data buffer passing data between the hardware function blocks.