Digital Signal Processing Reference
In-Depth Information
a
received sequence
r[k-4]
r[k-3]
r[k-2]
r[k-1]
r[k]
S[k]={d[k-1],d[k-2]}
0
0
0
0
0 0 0
1 0 1
2 1 0
3 1 1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
b
branch metric
computation
path-finder
path-selector
c
Fig. 12
High-speed MLSE architecture: (
a
) time-reversed trellis, in which a cold-start at
r
[
k
]
leads
to four possible reverse-survivor paths ending at states
s
[
k
−
D
]
,(
b
) VLSI architecture, and (
c
)path-
selector
survivor depth
D
, and time-reversed traversal of the trellis, it becomes possible
to implement the ACS computations in a fully feed-forward architecture. This
requirement.
Third, in order to avoid edge effects, past decisions are employed to select among
the four possible survivor paths. Though this choice results in a recursive stage
