Digital Signal Processing Reference
In-Depth Information
RVC Abstract Decoder Model
CAL
FNL
BSDL
Abstract
Decoder
Model
Scheduling
Analysis
SW code
HW code
generator
Simulator
SDF,
CSDF,
BDF,
DDF
VHDL
Verilog
Ptolemy
II
Open DF
Moses
C
ARM
Non-normative tools and simulators for RVC
Fig. 22
Illustration of the RVC-C AL simulation and compiling tools
Fig. 23 Dataflow Models of
Computation
5.2
CAL Analysis
This section presents a taxonomy of Models of Computation (MoCs) (Fig. 23 ) that
can model the different types of behavior that RVC-C AL actors can exhibit. The
actors in the Video Tool Library of the RVC standard can behave statically, cyclo-
statically, quasi-statically, or dynamically. Different MoCs exist in the literature that
are suitable to model these types of behaviors.
Dataflow MoCs are defined as subsets of a general model called Dataflow Process
Networks (DPNs). The taxonomy shown on Fig. 23 reflects the fact that MoCs are
progressively restricted from DPN towards SDF with respect to expressiveness, but
at the same time they become more amenable to analysis. We first study the rules
of DPN, and then present the models that can be used to model static, cyclo-static,
quasi-static, and dynamic RVC-CAL actors.
Dataflow models respect the semantics of DPNs: A dataflow model is a directed
graph whose vertices are actors and edges are unidirectional FIFO channels with
unbounded capacity, connected between ports of actors.
 
 
 
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