Digital Signal Processing Reference
In-Depth Information
A1
A3
In
+
+
X
X
M1
M3
X
X
M2
M4
D
D
+
+
Out
(D
2
)
(D
1
)
A2
A4
Fig. 8
Lattice filter structure
3.4
Application to Recursive Structures
The previous structure was non-recursive and simply involved application of delay
transfer. Many DSP functions involve feedback loops like the lattice filter structure
given in Fig.
8
which has a number of feedback loops.
apply pipelining at the processor level. The first step is to determine the pipelining
period of the structure which is done by working out the possible delays between
D
1
and
D
1
and then
D
1
and
D
2
, etc. The possible paths are given below.
D1 to D1
⇒
D1
→
M
4
→
A
3
→
D1
D1 to D2
⇒
D1
→
A
4
→
D
2and
D
1
→
M
4
→
A
3
→
M
3
→
A
4
→
D
2
D2 to D1
⇒
D2
→
M
2
→
A
1
→
A
3
→
D1
D2 to D2
⇒
D2
→
M
2
→
A
1
→
A
3
→
M
3
→
A
4
→
D
2
The next stage is to determine the pipelining period by applying the
longest path
the pipelining period. If
d
is assumed to be the number of delays in the DFG,
then a series of matrices,
L
(
m
)
,
m
=
1
,
2
,...,
d
is created such that the element
l
(
m
)
(
represents the longest path from delay element
D
i
to
D
j
which passes through
exactly
m
i
,
j
,
)
1 delays (not including
D
i
and
D
j
); if no path exists, then
l
(
m
)
(
1.
The iteration bound is found by examining the diagonal elements. The underlying
assumption is pipelining at the processor level and therefore a delay is required at
processing unit.
Examining the paths shown above, we generate matrices, L(1) as shown below
and the compute higher level matrices. The higher order matrices do not need to
derived from the DFG and can be recursively computed using the computation
l
(
m
+
1
)
(
−
is
−
i
,
j
,
)
max
l
(
1
)
(
l
(
m
)
(
,
)
=
k
∈
K
(
−
1
,
,
)
+
,
)
)
. This is given below for the lattice structure of
i
,
j
i
,
k
j
,
k
Fig.
3
as:
⎡
⎣
⎤
⎦
⎡
⎣
⎤
⎦
⇒
⎡
⎣
⎤
⎦
24
35
24
35
79
810
L
(
1
)
L
(
1
)
L
(
2
)
