Optimization of Number Representations - Signal Processing Systems - page 1308

the floating-point and fixed-point data types, and allows seamless and incremental
conversion. Note that incremental conversion can help a designer very much because
the effects of each small conversion can readily be verified. There are other fixed-
point formats used for similar purposes, and one of them is the Q format [ 2 ] . In the
Q format, the integer and fractional bits are given, while the sign is usually implied
as the two's complement. For example, “Q1,30” describes a fixed-point data with 1
integer bit and 30 fractional bits stored as a 32-bit two's complement number. The
Q format has been used widely for assembly programming of Texas Instruments
digital signal processors.
The simulation based range estimation and automatic conversion process be-
comes more and more popular as the computing power for simulation becomes
cheaper. The FRIDGE, a fixed-point design and simulation environment, supports
interpolative approach to reduce the range estimation overhead [ 25 ] . This tool also
supports integer and VHDL code generation path from a floating-point C program.
In these days, application oriented language, such as Matlab from MathWorks,
is frequently used for signal processing application development. The Simulink
package for Matlab and SPD (Signal Processing Designer) of CoWare support easy
to use, GUI (Graphic User Interface) supported, fixed-point arithmetic [ 1 , 4 ] . With
these tools, it is possible to convert a floating-point design into a fixed-point version
in an incremental and convenient way.
For the word-length optimization of VLSI and FPGA based design, several
different search methods have been studied recently [ 10 , 21 ] . For linear systems,
the word-length optimization is converted to an integer programming problem by
exploiting the additive quantization noise model [ 9 ] . A fixed-point optimization flow
that conducts both high-level synthesis and fixed-point optimization simultaneously
has been developed [ 19 ] . As one of the future works, integer code generation
for SIMD (Single Instruction Multiple Data) architecture is needed; this work
requires combined processing of scaling, word-length optimization, and automatic
vectorization. Also, fast word-length optimization of very large systems is an
interesting problem. The word-length optimization or scaling software needs to be
integrated into widely used CAD tools. The capability of fixed-point optimization
tools currently supported by commercial CAD software can hardly meet users'
expectation.

References

1. URL http://www.coware.com/products/signalprocessing.php
2. URL http://en.wikipedia.org/wiki/Q ( number format)

3. Fixed-Point C class. URL http://msl.snu.ac.kr/fixim/

4. Simulink. URL http://www.mathworks.com/products/simulink/
5. DSP56KCC User's Mannual. Motorola Inc. (1992).
6. TMS320C2x/C2xx/C5x Optimizing C Compiler (Version 6.60). Texas Instruments Inc., TX
(1995).
7. TMS320C6x Optimizing C Compiler. Texas Instruments Inc., TX (1997).

++