Optimization of Number Representations - Signal Processing Systems - page 1295

c

#define sll(x,y) ((x)<<(y))
int a1[3] = { 134217728, 47701920, 134217728 };
int a2[3] = { 1073741824, -1172370379, 1073741824 };
int b1[2] = { 1789541073, -810718027 };
int b2[2] = { 1696587243, -990934855 };
int d1[2];
int d2[2];
extern void iir4(int * x, int * y)
{

int x1;
int y1;
int t1;
int t2;
x1 = mulh(1374389534, * x);
t1 = sll(x1 + mulh( * b1, * d1) + mulh(b1[1], d1[1]), 2);
y1 = mulh( * a1, t1) + mulh(a1[1], * d1) + mulh(a1[2], d1[1]);
d1[1] = * d1;
* d1 = t1;
t2 = sll(y1 + mulh( * b2, * d2) + mulh(b2[1], d2[1]), 2);
* y = mulh( * a2, t2) + mulh(a2[1], * d2) + mulh(a2[2], d2[1]);
d2[1] = * d2;
* d2 = t2;

}

Fig. 13 (continued)

Tabl e 3 IWL determined by
the range estimation for the
fourth order filter

Original
IWL

Optimized
IWL

IWL
increment Va r i a b l e

x 17 20 3

y 15 18 3

x1 10 15 5

y1 14 18 4

t1, d1 12 13 1

t2, d2 16 16 0

b1, b2, a2 1 1 0

a1 1 4 3

Shift reduction is performed with a DSP architecture that employs a barrel shifter,
and the integer C code shown in Fig. 13 c is generated by controlling the IWL's.
When considering the expression of x1 = sll(mulh(1374389545, * x),
2) , we can eliminate the shift left operation by increasing the IWL of x1 by 2
bits. Note that the IWL reduction process requires simultaneous IWL modification
of several variables or constants. Table 3 gives the optimized IWL's and Fig. 13 c
shows the optimized integer C code. Although there can be a loss of bit resolution,
we can find that several redundant shift operations are successfully eliminated. In the
optimized code, left shift operations are eliminated when calculating x1 and y .We
can also find that 4 bit right shift operations are removed when using x1 and y1 .