Digital Signal Processing Reference
In-Depth Information
/
*
iohw_device.h
*
/
#define MYPORT1_TYPE_RD MM_DIR_8_DEV8_RD
#define MYPORT1_TYPE_WR MM_DIR_8_DEV8_WR
#define MYPORT1_ADR 0xBEAF
The compiler support is written in the
iohw.h
part. The macro
MM ACCESS
dereferences a memory mapped I/O address. The
MM DIR..
macros map a read and
write operation onto this dereference. The prototypes as specified in Embedded C
are mapped onto names in the device driver part by using token concatenation. The
device driver part maps them back onto the
MM DIR..
macros. The actual memory
mapped address is also specified through token concatenation.
/
*
iohw.h
*
/
/
*
Write to a SPR (Special Purpose Register)
*
/
asm void __mtspr(int spr, unsigned int v)
{
@[ .spr-serialize; .constant spr]
mtspr
@{spr},@{v}
}
/
*
Read from a SPR (Special Purpose Register)
*
/
asm unsigned int __mfspr(int spr)
{
@[ .spr-serialize; .constant spr]
mfspr
@{}, @{spr}
}
#define IO_DIR_32_DEV32_RD(ADR)
\
(__mfspr(ADR))
#define IO_DIR_32_DEV32_WR(ADR,VAL)
\
(__mtspr(ADR,(unsigned int)(VAL)))
#define iord(NAME)
\
NAME##_TYPE_RD(NAME##_ADR)
#define iowr(NAME,VAL)
\
NAME##_TYPE_WR(NAME##_ADR,VAL)
/
*
iohw_device.h
*
/
#define MYPORT2_TYPE_RD IO_DIR_32_DEV32_RD
#define MYPORT2_TYPE_WR IO_DIR_32_DEV32_WR
#define MYPORT2_ADR 311
Above is an example of I/O registers accessed through special instructions on the
PowerPC architecture. The main difference with the memory mapped example is
