Digital Signal Processing Reference
In-Depth Information
3
Code Optimizations
With efficiency being one of the most important design goals of digital signal
processors it is critical for a compiler to generate the most efficient code for any DSP
application. Hence, most DSP compilers perform routinely optimizations such as:
Rearranging code to combine blocks and minimize branching
Eliminating unnecessary recalculations of values
Combining equivalent constants
Eliminating unused code and storage of unreferenced values
Global register allocation
Inlining or replacing function and library calls with program code
Substituting operations to conserve resources
Eliminating ambiguous pointer references when possible
Manymore
Some of the more idiosyncratic architectural features such as complex instruction
patterns targeting frequently occurring DSP operations may still not be fully
exploited by conventional compilers. Much of the early work on code optimiza-
tion for embedded DSPs has therefore investigated improved code generation
paths traditional code generation approaches fail to produce efficient code and
compiler writers have developed more advanced, graph-based code generation
“compiler-friendly” and more conventional code generation techniques can be
applied.
In the following paragraphs we discuss a number of code optimization techniques
specific to digital signal processors. We cover address code and control flow
optimizations, loop and memory optimizations, and, eventually, optimizations for
reduced code size.
Conversion from floating-point to fixed-point implementation of an algorithm is
additional application knowledge about the expected dynamic range of the pro-
cessed signals is required.
A more comprehensive discussion of code optimization techniques for a wider
range of embedded processors, including DSPs and multimedia processors, is pre-