Hardware Reference
In-Depth Information
All Instructions Are Directly Executed by Hardware
All common instructions are directly executed by the hardware. They are not
interpreted by microinstructions. Eliminating a level of interpretation provides
high speed for most instructions. For computers that implement CISC instruction
sets, the more complex instructions may be broken into separate parts, which can
then be executed as a sequence of microinstructions. This extra step slows the ma-
chine down, but for less frequently occurring instructions it may be acceptable.
Maximize the Rate at Which Instructions Are Issued
Modern computers resort to many tricks to maximize their performance, chief
among which is trying to start as many instructions per second as possible. After
all, if you can issue 500 million instructions/sec, you have built a 500-MIPS proc-
essor, no matter how long the instructions actually take to complete. (
MIPS
stands
for Millions of Instructions Per Second. The MIPS processor was so named as to
be a pun on this acronym. Officially it stands for Microprocessor without Inter-
locked Pipeline Stages.) This principle suggests that parallelism can play a major
role in improving performance, since issuing large numbers of slow instructions in
a short time interval is possible only if multiple instructions can execute at once.
Although instructions are always encountered in program order, they are not
always issued in program order (because some needed resource might be busy) and
they need not finish in program order. Of course, if instruction 1 sets a register and
instruction 2 uses that register, great care must be taken to make sure that instruc-
tion 2 does not read the register until it contains the correct value. Getting this
right requires a lot of bookkeeping but has the potential for performance gains by
executing multiple instructions at once.
Instructions Should Be Easy to Decode
A critical limit on the rate of issue of instructions is decoding individual in-
structions to determine what resources they need. Anything that can aid this proc-
ess is useful. That includes making instructions regular, of fixed length, and with a
small number of fields. The fewer different formats for instructions, the better.
Only Loads and Stores Should Reference Memory
One of the simplest ways to break operations into separate steps is to require
that operands for most instructions come from—and return to—CPU registers.
The operation of moving operands from memory into registers can be performed in
separate instructions. Since access to memory can take a long time, and the delay
is unpredictable, these instructions can best be overlapped with other instructions
assuming they do nothing except move operands between registers and memory.
