Hardware Reference
In-Depth Information
Exp.
Explicit
Prefix
Exp.
Explicit
Prefix
10
−
3
0.001
milli
10
3
1,000
kilo
10
−
6
10
6
0.000001
micro
1,000,000 mega
10
−
9
0.000000001
nano
10
9
1,000,000,000
giga
10
−
12
10
12
0.000000000001
pico
1,000,000,000,000
tera
10
−
15
0.000000000000001
femto
10
15
1,000,000,000,000,000
peta
10
−
18
10
18
0.0000000000000000001
atto
1,000,000,000,000,000,000
exa
10
−
21
0.0000000000000000000001
zepto
10
21
1,000,000,000,000,000,000,000
zetta
10
−
24
10
24
0.0000000000000000000000001
yocto
1,000,000,000,000,000,000,000,000
yotta
Figure 1-16.
The principal metric prefixes.
To avoid ambiguity, the standards organizations have introduced the new terms
kibibyte for 2
10
bytes, mebibyte for 2
20
bytes, gibibyte for 2
30
bytes, and tebibyte
for 2
40
bytes, but the industry has been slow to adopt them. We feel that until these
new terms are in wider use, it is better to stick with the symbols KB, MB, GB, and
TB for 2
10
,2
20
,2
30
, and 2
40
bytes, respectively, and the symbols kbps, Mbps,
Gbps, and Tbps for 10
3
,10
6
,10
9
, and 10
12
bits/sec, respectively.
This topic is about multilevel computers (which includes nearly all modern
computers) and how they are organized. We will examine four levels in consid-
erable detail—namely, the digital logic level, the microarchitecture level, the ISA
level, and the operating system machine level. Some of the basic issues to be ex-
amined include the overall design of the level (and why it was designed that way),
the kinds of instructions and data available, the memory organization and ad-
dressing, and the method by which the level is implemented. The study of these
topics, and similar ones, is called computer organization or computer architecture.
We are primarily concerned with concepts rather than details or formal mathe-
matics. For that reason, some of the examples given will be highly simplified, in
order to emphasize the central ideas and not the details.
To provide some insight into how the principles presented in this topic can be,
and are, applied in practice, we will use the x86, ARM, and AVR architectures as
running examples throughout the topic. These three have been chosen for several
reasons. First, all are widely used and the reader is likely to have access to at least
one of them. Second, each one has its own unique architecture, which provides a
basis for comparison and encourages a ''what are the alternatives?'' attitude.
Topics dealing with only one machine often leave the reader with a ''true machine
design revealed'' feeling, which is absurd in light of the many compromises and
arbitrary decisions that designers are forced to make. The reader is encouraged to
