Hardware Reference
In-Depth Information
GASPAR, L., FISCHER, V., BERNARD, F., BOSSUET, L., and COTRET, P.: ''HCrypt: A
Novel Concept of Crypto-processor with Secured Key Management,'' Int'l Conf. on
Reconfigurable Computing and FPGAs , 2010.
GAUR, J., CHAUDHURI, C., and SUBRAMONEY, S.: ''Bypass and Insertion Algorithms for
Exclusive Last-level Caches,'' Proc. 38th Int'l Symp. on Computer Arch. , ACM, 2011.
GEBHART, M., JOHNSON, D.R., TARJAN, D., KECKLER, S.W., DALLY, W.J., LINDHOLM,
E., and SKADRON, K.: ''Energy-efficient Mechanisms for Managing Thread Context
in Throughput Processors,'' Proc. 38th Int'l Symp. on Computer Arch. ACM, 2011.
GEIST, A., BEGUELIN, A., DONGARRA, J., JIANG, W., MANCHECK, R., and SUNDER-
RAM, V.: PVM: Parallel Virtual Machine—A User's Guide and Tutorial for Networked
Parallel Computing , Cambridge, MA: MIT Press, 1994.
GEPNER, P., GAMAYUNOV, V., and FRASER, D.L.: ''The 2nd Generation Intel Core Pro-
cessor. Architectural Features Supporting HPC,'' Proc. 10th Int'l Symp. on Parallel
and Dist. Computing , pp. 17-24, 2011.
GERBER, R., and BINSTOCK, A.: Programming with Hyper-Threading Technology , Santa
Clara, CA: Intel Press, 2004.
GHARACHORLOO, K., LENOSKI, D., LAUDON, J., GIBBONS, P.B., GUPTA, A., and HEN-
NESSY, J.L.: ''Memory Consistency and Event Ordering in Scalable Shared-Memory
Multiprocessors,'' Proc. 17th Ann. Int'l Symp. on Comp. Arch. , ACM, pp. 15-26, 1990.
GHEMAWAT, S., GOBIOFF, H., and LEUNG, S.-T.: ''The Google File System,'' Proc. 19th
Symp. on Operating Systems Principles , ACM, pp. 29-43, 2003.
GOODMAN, J.R.: ''Using Cache Memory to Reduce Processor Memory Traffic,'' Proc.
10th Ann. Int'l Symp. on Computer Arch. , ACM, pp. 124-131, 1983.
GOODMAN, J.R.: ''Cache Consistency and Sequential Consistency,'' Tech. Rep. 61, IEEE
Scalable Coherent Interface Working Group, IEEE, 1989.
GOTH, G.: ''IBM PC Retrospective: There Was Enough Right to Make It Work,'' IEEE
Computer , vol. 44, pp. 26-33, Aug. 2011.
GROPP, W., LUSK, E., and SKJELLUM, A.: Using MPI: Portable Parallel Programming
with the Message Passing Interface , Cambridge, MA: MIT Press, 1994.
GUPTA, N., MANDAL, S., MALAVE, J., MANDAL, A., and MAHAPATRA, R.N.: ''A Hard-
ware Scheduler for Real Time Multiprocessor System on Chip,'' Proc. 23rd Int'l Conf.
on VLSI Design, IEEE, 2010.
GURUMURTHI, S., SIVASUBRAMANIAM, A., KANDEMIR, M., and FRANKE, H.:
''Reducing Disk Power Consumption in Servers with DRPM,'' IEEE Computer Maga-
zine , vol. 36, pp. 59-66, Dec. 2003.
HAGERSTEN, E., LANDIN, A., and HARIDI, S.: ''DDM—A Cache-Only Memory Archi-
tecture,'' IEEE Computer Magazine , vol. 25, pp. 44-54, Sept. 1992.
HAGHIGHIZADEH, F., ATTARZADEH, H., and SHARIFKHANI, M.: ''A Compact 8-Bit
AES Crypto-processor,'' Proc. Second. Int'l Conf. on Computer and Network Tech. ,
IEEE, 2010.
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