Hardware Reference
In-Depth Information
These are the program counter, program status word, and two registers that relate
to interrupts. Finally, a 64-bit register counts the number of CPU cycles since the
CPU was last reset. At 300 MHz, it takes nearly 2000 years for the counter to
wrap around.
The Trimedia TM3260 has 11 different functional units for doing arithmetic,
logical, and control flow operations (as well as one for cache control that we will
not discuss here). They are listed in Fig. 8-4. The first two columns name the unit
and give a brief description of what it does. The third column tells how many
hardware copies of the unit exist. The fourth column gives the latency, that is, how
many clock cycles it takes to complete. In this context, it is worth nothing that all
the functional units except the FP square-root/divide unit are pipelined. The
latency given in the table tells how long before the result of an operation is avail-
able, but a new operation can be initiated every cycle. Thus, for example, each of
three consecutive instructions can hold two load operations, resulting in six loads
in various stages of execution at the same time.
Finally, the last five columns show which instruction slots can be used for
which functional unit. For example, floating-point compare operations must
appear only in the third slot of an instruction
Unit
Description
#
Lat. 12345
Constant
Immediate operations
5
1 xxxxx
Integer ALU 32-Bit arithmetic, Boolean ops
5
1 xxxxx
Shifter
Multibit shifts
2
1 xxxxx
Load/Store
Memory operations
2
3
x
x
Int/FP MUL
32-Bit integer and FP multiplies
2
3
x
x
FP ALU
FP arithmetic
2
3
x
x
FP compare
FP compares
1
1
x
FP sqrt/div
FP division and square root
1
17
x
Branch
Control flow
3
3
x
x
x
DSP ALU
Dual 16-bit, quad 8-bit multimedia arithmetic 2
3
x
x
x
DSP MUL
Dual 16-bit, quad 8-bit multimedia multiplies
2
3
x
x
Figure 8-4. The TM3260 functional units, their quantity, latency, and which instruction
slots they can use.
The constant unit is used for immediate operations, such as loading a number
stored in the operation itself into a register. The integer ALU does addition,
subtraction, the usual Boolean operations, and pack/unpack operations. The shifter
can shift a register in either direction a specified number of bits.
The load/store unit fetches memory words into registers and writes them back.
The TriMedia is basically an augmented RISC CPU, so normal operations operate
on registers and the load/store unit is used to access memory. Transfers can be 8,
16, or 32 bits. Arithmetic and logical instructions do not access memory.
 
Search WWH ::




Custom Search