Hardware Reference
In-Depth Information
one into Core i7 assembly language and IJVM. Then compute how many bytes each
expression requires for each machine. Assume that
i
and
j
are local variables in memo-
ry, but otherwise make the most optimistic assumptions in all cases
a.
i=3;
b.
i=j;
c.
i=j
1;
−
29.
The loop instructions discussed in the text were for handling
for
loops. Design an in-
struction that might be useful for handling common
while
loops instead.
30.
Assume that the monks in Hanoi can move 1 disk per minute (they are in no hurry to
finish the job because employment opportunities for people with this particular skill
are limited in Hanoi). How long will it take them to solve the entire 64-disk problem?
Express your result in years.
31.
Why do I/O devices place the interrupt vector on the bus? Would it be possible to store
that information in a table in memory instead?
32.
A computer uses DMA to read from its disk. The disk has 64 512-byte sectors per
track. The disk rotation time is 16 msec. The bus is 16 bits wide, and bus transfers
take 500 nsec each. The average CPU instruction requires two bus cycles. How much
is the CPU slowed down by DMA?
33.
The DMA transfer described in Fig. 5-32 requires 2 bus transfers to move data between
an I/O device and memory. Describe how the performance of DMA can be improved
by using the bus architecture in Fig. 3-35. 3.
34.
Why do interrupt service routines have priorities associated with them whereas normal
procedures do not have priorities?
35.
The IA-64 architecture contains an unusually large number of registers (64). Was the
choice to have so many of them related to the use of predication? If so, in what way?
If not, why are there so many?
36.
In the text, the concept of speculative
LOAD
instructions is discussed. However, there is
no mention of speculative
STORE
instructions. Why not? Are they essentially the
same as speculative
LOAD
instructions or is there another reason not to discuss them?
37.
When two local area networks are to be connected, a computer called a bridge is insert-
ed between them, connected to both. Each packet transmitted on either network causes
an interrupt on the bridge, to let the bridge see if the packet has to be forwarded. Sup-
pose that it takes 250
μ
sec per packet to handle the interrupt and inspect the packet, but
forwarding it, if need be, is done by the DMA hardware without burdening the CPU.
If all packets are 1 KB, what is the maximum data rate on each of the networks that
can be tolerated without having the bridge lose packets?
38.
In Fig. 5-40, the frame pointer points to the first local variable. What information does
the program need in order to return from a procedure?
39.
Write an assembly language subroutine to convert a signed binary integer to ASCII.
40.
Write an assembly language subroutine to convert an infix formula to reverse Polish.
