Hardware Reference
In-Depth Information
0 Address
1 Address
2 Address
3 Address
MOV
(X=Y)
MOV
(X=Y)
PUSH M
LOAD M
ADD
(X = X+Y)
(X = Y+Z)
POP M
STORE M
ADD
SUB
(X=X
−
Y)
(X=Y
−
Z)
ADD
ADD M
SUB
MUL
(X=X
∗
Y)
(X=Y
∗
Z)
SUB
SUB M
MUL
(X = X/Y)
(X = Y/Z)
MUL
MUL M
DIV
DIV
DIV
DIV M
M
is a 16-bit memory address, and
X
,
Y
, and
Z
are either 16-bit addresses or 4-bit reg-
isters. The 0-address machine uses a stack, the 1-address machine uses an accumula-
tor, and the other two have 16 registers and instructions operating on all combinations
of memory locations and registers.
SUB X,Y
subtracts
Y
from
X
and
SUB X,Y,Z
subtracts
Z from
Y
and puts the result in
X
. With 8-bit opcodes and instruction lengths that are
multiples of 4 bits, how many bits does each machine need to compute
X
?
8.
Devise an addressing mechanism that allows an arbitrary set of 64 addresses, not nec-
essarily contiguous, in a large address space to be specifiable in a 6-bit field.
9.
Give a disadvantage of self-modifying code that was not mentioned in the text.
10.
Convert the following formulas from infix to reverse Polish notation.
a. A
+
B
+
C
+
D
−
E
b. (A
−
B)
×
(C
+
D)
+
E
c. (A
×
B)
+
(C
×
D)
−
E
H
11.
Which of the following pairs of reverse Polish notation formulas are mathematically
equivalent?
d. (A
−
B)
×
(((C
−
D
×
E)/F)/G)
×
a. AB
+
C
+
and ABC
++
b. A B
−
C
−
and ABC
−−
c. AB
×
C
+
and ABC
+×
12.
Convert the following reverse Polish notation formulas to infix.
a. AB
−
C
+
D
×
b.AB/CD/
+
c.ABCDE
+××
/
×+
13.
Write three reverse Polish notation formulas that cannot be converted to infix.
14.
Convert the following infix Boolean formulas to reverse Polish notation.
d.ABCDE
×
F/
+
G
−
H/
a. (A AND B) OR C
b. (A OR B) AND (A OR C)
c. (A AND B) OR (C AND D)
15.
Convert the following infix formula to reverse Polish notation and generate IJVM code
to evaluate it.
(5
×
2
+
7)
−
(4/2
+
1)
