Hardware Reference
In-Depth Information
#define Param0
r0
#define Param1
r1
#define Param2
r2
#define FormatPtr
r0
#define k
r7
#define n minus 1
r5
.text
towers: push {r3, r4, r5, r6, r7, lr}
@ save return addr and touched regs
mov r4, Param1
mov r6, Param2
cmp Param0, #1 @ is (n == 1)?
bne else @ if not, jump to else code sequence
movw FormatPtr, #:lower16:format @ load format string pointer
movt FormatPtr, #:upper16:format
bl printf
@ print move
pop {r3, r4, r5, r6, r7, pc}
else:
rsb k, r1, #6
@k=6
i
j
−
−
subs k, k, r2
add n minus 1, r0, #-1
@ compute (n-1) for recursive call
mov r0, n minus 1
mov r2, k
bl towers
@ call towers(n
1, i, k)
−
mov r0, #1
mov r1, r4
mov r2, r6
bl towers
@ call towers(1, k, j)
mov r0, n minus 1
mov r1, k
mov r2, r6
bl towers
@ call towers(n
−
1, k, j)
pop {r3, r4, r5, r6, r7, pc}
@ restore touched registers and return to called
.global main
main:
push {lr}
@ save called's return address
mov Param0, #3
mov Param1, #1
mov Param2, Param0
bl towers
@ call towers(3, 1, 3)
pop {pc}
@ pop return address, return to called
format:
.ascii "Move a disk from %d to %d\n\0"
Figure 5-45.
The Towers of Hanoi for the OMAP4430 ARM CPU.
Before getting into the details of the IA-64 and Itanium 2, it is useful to review
what is wrong with the IA-32 ISA to see what problems Intel was trying to solve
with the new architecture. The main fact of life that causes all the trouble is that
