THE INSTRUCTION SET ARCHITECTURE LEVEL - Structured Computer Organization - page 401

Loads Shifts/rotates

LDRSB DST,ADDR
LDRB DST,ADDR
LDRSH DST,ADDR
LDRH DST,ADDR
LDR DST,ADDR
LDM S1,REGLIST

Load signed byte (8 bits)
Load unsigned byte (8 bits)
Load signed halfwords (16 bits)
Load unsigned halfwords (16 bits)
Load word (32 bits)

LSL DST,S1,S2IMM
LSR DST,S1,S2IMM
ASR DST,S1,S2IMM
ROR DSR,S1,S2IMM

Logical shift left
Logical shift right
Arithmetic shift right
Rotate right

Boolean

Load multiple words

TST DST,S1,S2IMM
TEQ DST,S1,S2IMM
AND DST,S1,S2IMM
EOR DST,S1,S2IMM
ORR DST,S1,S2IMM

Test bits
Test equivalence
Boolean AND
Boolean Exclusive-OR
Boolean OR

Stores

STRB DST,ADDR
STRH DST,ADDR
STR DST,ADDR
STM SRC,REGLIST

Store byte (8 bits)
Store halfword (16 bits)
Store word (32 bits)

Store multiple words BIC DST,S1,S2IMM Bit clear

Arithmetic

Transfer of control

ADD DST,S1,S2IMM
ADD DST,S1,S2IMM
SUB DST,S1,S2IMM
SUB DST,S1,S2IMM
RSB DST,S1,S2IMM
RSC DST,S1,S2IMM
MUL DST,S1,S2
MLA DST,S1,S2,S3
UMULL D1,D2,S1,S2
SMULL D1,D2,S1,S2
UMLAL D1,D2,S1,S2
SMLAL D1,D2,S1,S2

Add
Add with carry
Subtract
Subtract with carry
Reverse subtract
Reverse subtract with carry

Bcc IMM
BLcc IMM

Branch to PC+IMM
Branch with link to PC+IMM

BLcc S1 Branch with link to reg add

Miscellaneous

MOV DST,S1
MOVT DST,IMM
MVN DST,S1
MRS DST,PSR
MSR PSR,S1
SWP DST,S1,ADDR
SWPB DST,S1,ADDR

Move register
Move imm to upper bits
NOT register
Read PSR
Write PSR
Swap reg/mem word
Swap reg/mem byte

Multiply

Multiple and accumulate

Unsigned long multiple
Signed long multiple
Unsigned long MLA
Signed long MLA

CMP S1,S2IMM Compare and set PSR SWI IMM Software interrupt

S1 = source register
S2IMM = source register or immediate
S3 = source register (when 3 are used)
DST = destination register
D1 = destination register (1 of 2)
D2 = destination register (2 of 2)

ADDR = memory address
IMM = immediate value
REGLIST = list of registers
PSR = processor status register
cc = branch condition

Figure 5-34. The primary OMAP4430 ARM CPU integer instructions.

within the register, such that bits that rotate off the least significant bit reappear as
the most significant bit. The shifts are mostly used for bit manipulation. Rotates
are useful for cryptographic and image-processing operations. Most CISC ma-
chines have a vast number of shift and rotate instructions, nearly all of them totally
useless. Few compiler writers will spend restless nights mourning their absence.
The Boolean instruction group is analogous to the arithmetic one. It includes
AND , EOR , ORR , TST , TEQ , and BIC . The latter three are of questionable value, but
they can be done in one cycle and require almost no additional hardware so they
got thrown in. Even RISC machine designers sometimes succumb to temptation.
The next instruction group contains the control transfers. Bcc represents a set
of instructions that branch on the various conditions. BLcc is similar in that it