Hardware Reference
In-Depth Information
In this mode, the operand being specified comes from memory or goes to
memory, but its address is not hardwired into the instruction, as in direct ad-
dressing. Instead, the address is contained in a register. An address used in this
manner is called a
pointer
. A big advantage of register indirect addressing is that
it can reference memory without paying the price of having a full memory address
in the instruction. It can also use different memory words on different executions
of the instruction.
To see why using a different word on each execution might be useful, imagine
a loop that steps through the elements of a 1024-element one-dimensional integer
array to compute the sum of the elements in register
R1
. Outside the loop, some
other register, say,
R2
, can be set to point to the first element of the array, and an-
other register, say,
R3
, can be set to point to the first address beyond the array.
With 1024 integers of 4 bytes each, if the array begins at
A
, the first address
beyond the array will be
A
4096. Typical assembly code for doing this calcula-
tion is shown in Fig. 5-17 for a two-address machine.
+
MOV R1,#0
; accumulate the sum in R1, initially 0
MOV R2,#A
; R2 = address of the array A
MOV R3,#A+4096
; R3 = address of the first word beyond A
LOOP: ADD R1,(R2)
; register indirect through R2 to get operand
ADD R2,#4
; increment R2 by one word (4 bytes)
CMP R2,R3
; are we done yet?
BLT LOOP
; if R2 < R3, we are not done, so continue
Figure 5-17.
A generic assembly program for computing the sum of the ele-
ments of an array.
In this little program, we use several addressing modes. The first three instruc-
tions use register mode for the first operand (the destination) and immediate mode
for the second operand (a constant indicated by the # sign). The second instruction
puts the
address
of
A
in
R2
, not the contents. That is what the # sign tells the
assembler. Similarly, the third instruction puts the address of the first word beyond
the array in
R3
.
What is interesting to note is that the body of the loop itself does not contain
any memory addresses. It uses register and register indirect mode in the fourth in-
struction. It uses register and immediate mode in the fifth instruction and register
mode twice in the sixth instruction. The
BLT
might use a memory address, but
more likely it specifies the address to branch to with an 8-bit offset relative to the
BLT
instruction itself. By avoiding the use of memory addresses completely, we
have produced a short, fast loop. As an aside, this program is really for the Core
i7, except that we have renamed the instructions and registers and changed the
