Hardware Reference
In-Depth Information
that indicates if an interrupt is pending. The
program counter
holds the address of
the instruction currently executing. To perform an ALU operation, the operands
are first read from the register and sent to the ALU. The ALU output can be writ-
ten to any of the writable registers via the main bus.
The ATmega168 has multiple memories for data and instructions. The data
SRAM is 1 KB, too large to be fully addressed with an 8-bit address on the main
bus. Thus, the AVR architecture allows addresses to be constructed with a sequen-
tial pair of 8-bit registers, thereby producing a 16-bit address that supports up to 64
KB of data memory. The EEPROM provides up to 1 KB of nonvolatile storage
where programs can write variables that need to survive a power outage.
A similar mechanism exists to address program memory, but 64 KB of code is
too small, even for low-cost embedded systems. To allow more instruction memory
to be addressed the AVR architecture defines three RAM page registers (RAMPX,
RAMPY, and RAMPZ), each 8 bits wide. The RAM page register is concatenated
with a 16-bit register pair to produce a 24-bit program address, thereby allowing 16
MB of instruction address space.
Stop to think about that for a minute. 64 KB of code is too small for a
microcontroller that might power a toy or small appliance. In 1964, IBM released
the System 360 Model 30, which had 64 KB of total memory (with no tricks for
upgrading it). It sold for $250,000, which is roughly $2 million in today's dollars.
The ATmega168 costs about $1, less if you buy a lot of them at once. If you check
out, say, Boeing's price list, you will discover that airplane prices have not dropped
by a factor of 250,000 in the past 50 or so years. Nor have the prices of cars or
televisions or anything except computers.
In addition, the ATmega168 has an on-chip interrupt controller, serial port in-
terface (SPI), and timers, which are essential for real-time applications. There are
also three 8-bit digital I/O ports, which allow the ATmega168 to control up to 24
external buttons, lights, sensors, actuators, and so on. It is the presence of the
timers and I/O ports more than anything else that makes it possible to use the
ATmega168 for embedded applications without any additional chips.
The ATmega168 is a synchronous processor, with most instructions taking one
clock cycle, although some take more. The processor is pipelined, such that while
one instruction is being fetched, the previous instruction is being executed. The
pipeline is only two stages, however, fetch and execute. To execute instructions in
one cycle, the clock cycle must accommodate reading the register from the register
file, followed by executing the instruction in the ALU, followed by writing the reg-
ister back to the register file. Because all of these operations occur in one clock
cycle, there is no need for bypass logic or stall detection. Program instructions are
executed in order, in one cycle, and without overlap with other instructions.
While we could go into more detail about the ATmega168, the description
above and Fig. 4-50 give the basic idea. The ATmega168 has a single main bus (to
reduce chip area), a heterogeneous set of registers, and a variety of memories and
I/O devices hanging off the main bus. On each data path cycle, two operands are
