Hardware Reference
In-Depth Information
Addr - Contains the address of a potential next microinstruction.
JAM - Determines how the next microinstruction is selected.
ALU - ALU and shifter functions.
C - Selects which registers are written from the C bus.
Mem - Memory functions.
B - Selects the B bus source; it is encoded as shown.
The ordering of the groups is, in principle, arbitrary, although we have actually
chosen it very carefully to minimize line crossings in Fig. 4-6. Line crossings in
schematic diagrams like Fig. 4-6 often correspond to wire crossings on chips,
which cause trouble in two-dimensional designs and are best minimized.
4.1.3 Microinstruction Control: The Mic-1
So far we have described how the data path is controlled, but we have not yet
described how it is decided which control signals should be enabled on each cycle.
This is determined by a sequencer that is responsible for stepping through the se-
quence of operations for the execution of a single ISA instruction.
The sequencer must produce two kinds of information each cycle:
1. The state of every control signal in the system.
2. The address of the microinstruction that is to be executed next.
Figure 4-6 is a detailed block diagram of the complete microarchitecture of our
example machine, which we will call the Mic-1 . It may look intimidating initially
but is worth studying carefully. When you fully understand every box and every
line in this figure, you will be well on your way to understanding the microarchi-
tecture level. The block diagram has two parts: the data path, on the left, which we
have already discussed in detail, and the control section, on the right, which we
will now look at.
The largest and most important item in the control portion of the machine is a
memory called the control store . It is convenient to think of it as a memory that
holds the complete microprogram, although it is sometimes implemented as a set
of logic gates. In general, we will refer to it as the control store, to avoid confusion
with the main memory, accessed through MBR and MDR . Functionally, however,
the control store is a memory that simply holds microinstructions instead of ISA
instructions. For our example machine, it contains 512 words, each consisting of
one 36-bit microinstruction of the kind illustrated in Fig. 4-5. Actually, not all of
these words are needed, but (for reasons to be explained shortly) we need ad-
dresses for 512 distinct words.
 
 
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