Hardware Reference
In-Depth Information
is based on the fact that all EPROM addresses, and only EPROM addresses, have a
0 in the high-order bit,
A15
. Therefore, we can just wire
CS
to
A15
directly, as
shown in Fig. 3-61(b).
At this point the decision to put the RAM at 8000H may seem much less arbi-
trary. The RAM decoding can be done by noting that the only valid addresses of
the form 10xxxxxxxxxxxxxx are in the RAM, so 2 bits of decoding are sufficient.
Similarly, any address starting with 11 must be a PIO address. The complete de-
coding logic is now two
NAND
gates and an inverter.
The address decoding logic of Fig. 3-61(b) is called
partial address decoding
,
because the full addresses are not used. It has the property that a read from ad-
dresses 0001000000000000, 0001100000000000, or 0010000000000000 will give
the same result. In fact, every address in the bottom half of the address space will
select the EPROM. Because the extra addresses are not used, no harm is done, but
if one is designing a computer that may be expanded in the future (an unlikely oc-
currence in a toy), partial decoding should be avoided because it ties up too much
address space.
Another common address-decoding technique is to use a decoder, such as that
shown in Fig. 3-13. By connecting the three inputs to the three high-order address
lines, we get eight outputs, corresponding to addresses in the first 8K, second 8K,
and so on. For a computer with eight RAMs, each 8K
×
8, one such chip provides
the complete decoding. For a computer with eight 2K
8 memory chips, a single
decoder is also sufficient, provided that the memory chips are each located in dis-
tinct 8-KB chunks of address space. (Remember our earlier remark that the posi-
tion of the memory and I/O chips within the address space matters.)
×
Computers are constructed from integrated circuit chips containing tiny
switching elements called gates. The most common gates are
AND
,
OR
,
NAND
,
NOR
, and
NOT
. Simple circuits can be built up by directly combining individual
gates.
More complex circuits are multiplexers, demultiplexers, encoders, decoders,
shifters, and ALUs. Arbitrary Boolean functions can be programmed using a
FPGA. If many Boolean functions are needed, FPGAs are often more efficient.
The laws of Boolean algebra can be used to transform circuits from one form to
another. In many cases more economical circuits can be produced this way.
Computer arithmetic is done by adders. A single-bit full adder can be con-
structed from two half adders. An adder for a multibit word can be built by con-
necting multiple full adders in such a way as to allow the carry out of each one
feed into its left-hand neighbor.
The components of (static) memories are latches and flip-flops, each of which
can store one bit of information. These can be combined linearly into latches and
