Hardware Reference
In-Depth Information
8
CS
Por t A
2
A0-A1
Parallel I/O
(PIO)
Interface
WR
RD
8
Por t B
RESET
D0-D7
8
8
Por t C
Figure 3-59.
A 24-bit PIO Interface.
each port is an 8-bit latch register. To set the lines on an output port, the CPU just
writes an 8-bit number into the corresponding register, and the 8-bit number ap-
pears on the output lines and stays there until the register is rewritten. To use a port
configured for input, the CPU just reads the corresponding 8-bit latch register.
It is possible to build more sophisticated PIO interfaces. For example, one pop-
ular operating mode provides for handshaking with external devices. For example,
to output to a device that is not always ready to accept data, the PIO can present
data on an output port and wait for the device to send a pulse back saying that it
has accepted the data and wants more. The necessary logic for latching such pulses
and making them available to the CPU includes a ready signal plus an 8-bit register
queue for each output port.
From the functional diagram of the PIO we can see that in addition to 24 pins
for the three ports, it has eight lines that connect directly to the data bus, a chip
select line, read and write lines, two address lines, and a line for resetting the chip.
The two address lines select one of the four internal registers, corresponding to
ports A, B, C, and the port configuration register. Normally, the two address lines
are connected to the low-order bits of the address bus. The chip select line allows
the 24-bit PIO to be combined to form larger PIO interfaces, by adding additional
address lines and using them to select the proper PIO interface by asserting its chip
select line.
Up until now we have been deliberately vague about how chip select is
asserted on the memory and I/O chips we have looked at. It is now time to look
more carefully at how this is done. Let us consider a simple 16-bit embedded com-
puter consisting of a CPU, a 2KB
8
byte RAM for the data, and a PIO interface. This small system might be used as a
prototype for the brain of a cheap toy or simple appliance. Once in production, the
EPROM might be replaced by a ROM.
The PIO interface can be selected in one of two ways: as a true I/O device or as
part of memory. If we choose to use it as an I/O device, then we must select it
×
8 byte EPROM for the program, a 2
−
KB
×
