Hardware Reference
In-Depth Information
Getting back to the memory circuit, it should now be clear what the three non-
inverting buffers on the data output lines are for. When CS , RD , and OE are all high,
the output enable signal is also high, enabling the buffers and putting a word onto
the output lines. When any one of CS , RD ,or OE is low, the data outputs are
disconnected from the rest of the circuit.
3.3.5 Memory Chips
The nice thing about the memory of Fig. 3-28 is that it extends easily to larger
sizes. As we drew it, the memory is 4
×
3, that is, four words of 3 bits each. To
extend it to 4
8 we need only add five more columns of four flip-flops each, as
well as five more input lines and five more output lines. To go from 4
×
3
we must add four more rows of three flip-flops each, as well as an address line A 2 .
With this kind of structure, the number of words in the memory should be a power
of 2 for maximum efficiency, but the number of bits in a word can be anything.
Because integrated-circuit technology is well suited to making chips whose in-
ternal structure is a repetitive two-dimensional pattern, memory chips are an ideal
application for it. As the technology improves, the number of bits that can be put
on a chip keeps increasing, typically by a factor of two every 18 months (Moore's
law). The larger chips do not always render the smaller ones obsolete due to dif-
ferent trade-offs in capacity, speed, power, price, and interfacing convenience.
Commonly, the largest chips currently available sell at a premium and thus are
more expensive per bit than older, smaller ones.
For any given memory size, there are various ways of organizing the chip.
Figure 3-30 shows two possible organizations for an older memory chip of size 4
Mbit: 512K
×
3to8
×
1. (As an aside, memory-chip sizes are usually
quoted in bits, rather than in bytes, so we will stick to that convention here.) In
Fig. 3-30(a), 19 address lines are needed to address one of the 2 19 bytes, and eight
data lines are needed for loading or storing the byte selected.
A note on terminology is in order here. On some pins, the high voltage causes
an action to happen. On others, the low voltage causes the action. To avoid confu-
sion, we will consistently say that a signal is asserted (rather than saying it goes
high or goes low) to mean that it is set to cause some action. Thus, for some pins,
asserting it means setting it high. For others, it means setting the pin low. Pins
that are asserted low are given signal names con taining an overbar. Thus, a signal
named CS is asserted high, but one named CS is asserted low. The opposite of
asserted is negated . When nothing special is happening, pins are negated.
Now let us get back to our memory chip. Since a computer normally has many
memory chips, a signal is needed to select the chip that is currently needed so that
it responds and all the others do not. The CS (Chip Select) signal is provided for
this purpose. It is assert ed t o enable the chip. Also, a way is needed to distinguish
reads from writes. The WE signal (Write Enable) is used to indicate that data are
×
8 and 4096K
×
 
 
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