Environmental Engineering Reference
In-Depth Information
capacitor by controlling an auxiliary converter loaded with an inductor to entirely
eliminate the electrolytic capacitors. Since electrolytic capacitors are deemed the
most unreliable component in power electronic systems, this approach does have
merit. However, the added cost of four additional power semiconductors needed for
the auxiliary H-bridge converter interface to the inductor make this somewhat
impractical, but an interesting prospect nonetheless.
It is also possible to minimize the dc link capacitance through a means of
interleaving the inverter pulse currents. Huang
et al
. [25] show that a phase dis-
placed inverter system in which a pair of 0.5 pu rated inverter modules drive a dual
winding IM from a common dc bus is capable of significantly reducing capacitor
ripple current. In this system the electric machine is a quasi-6-phase machine
having dual 3-phase windings that are phase shifted and controlled via independent
inverters. By interleaving the PWM control signals to the dual inverters, the
effective dc link current that must be circulated within the link capacitors is halved
in magnitude and doubled in frequency. Because losses are proportional to
I
2
R
, this
technique effectively reduces the total capacitor dissipation to one-half its nominal
value. Figure 6.24 illustrates the concept of interleaved PWM for dc link capacitor
ripple current minimization.
A2 A1
Power electronics - 1st group
V
b
C2
C1
B2 B1
Power electronics - 2nd group
Control electronics
C'md's
Controller, Comm.
gate drives, Pwr supply
Figure 6.24 Interleaved PWM
In a conventional ac drive system, the dc link capacitor and battery experience
high discharge pulse magnitudes and dwell times. In the interleaved system shown
in Figure 6.24, the battery current and the link capacitor are diminished in magni-
tude, but doubled in frequency of occurrence. Figure 6.25 illustrates the current
waveforms to be expected from interleaved PWM control.
