Environmental Engineering Reference
In-Depth Information
Equation (6.19) summarizes the calculations leading to SVPWM. It is also
evident that with a fast digital processor these calculations can be processed online
and quickly since half the coefficients are constants or easily obtained from look-up
tables as the reference vector moves from sector to sector in the inverter state
diagram. It is also clear from (6.19) how the modulation depth impacts the time
intervals. Higher levels of modulation index result in a larger fraction of the total
switching period being devoted to adjacent state vectors and a diminishing amount
of time for the null vector.
Next, it is instructive to illustrate the particular switching pattern characteristic
of SVPWM during one switching cycle. It is also important to recognize that in
SVPWM the inverter gating frequency is one-half the state clock frequency.
For example, if the clock frequency is
f
clk
then the inverter switching frequency
f
s
=
f
clk
/2.
The average value over a switching cycle of inverter phase to negative bus
voltages
U
1
,
U
2
and
U
3
are calculated with the aide of Figure 6.14. To clarify, the
voltages given by (6.20) are from the inverter phase leg to negative bus where
subscripts 1, 2 and 3 are used in lieu of
a
,
b
and
c
phases for convenience:
U
dc
T
T
0
2
þ
T
1
þ
T
2
þ
T
0
2
U
1
¼
U
dc
T
T
0
2
T
1
þ
T
2
þ
T
0
2
U
2
¼
ð
6
:
20
Þ
U
dc
T
T
0
2
T
1
T
2
þ
T
0
2
U
3
¼
¼
U
1
When the relations given in (6.19) are substituted into (6.20) with appropriate
subscript change, the inverter to negative rail voltages are
3
2
p
U
1
¼
p
m
i
U
dc
sin
g þ
6
p
U
2
¼
m
i
U
dc
sin
g
ð
6
:
21
Þ
3
2
p
U
3
¼
p
m
i
U
dc
sin
g
þ
