Environmental Engineering Reference
In-Depth Information
As noted in Figure 6.7, the inverter mid-point voltages are referenced to
inverter negative bus, point '0', and the 3-phase load voltages are referenced to the
load neutral,
n
. Inverter line-to-line voltages are as depicted. For a particular vol-
tage vector the inverter switching states are as listed in Table 6.1.
Table 6.1 Inverter switch states
Mid-point '
a
'
Mid-point '
b
'
Mid-point '
c
'
Vector
0
0
0
U
0
1
1
1
U
7
1
0
0
U
1
1
1
0
U
2
0
1
0
U
3
0
1
1
U
4
0
0
1
U
5
0
0
1
U
6
The corresponding line-to-line and line-to-neutral voltages are given as (6.3) in
terms of total rms (including all harmonics) and fundamental component, rms,
during six step square wave mode:
r
U
dc
¼
0
:
816
U
dc
2
3
U
ab
¼
(V
rms
Þ
ð
6
:
3
Þ
p
p
U
dc
¼
0
:
78
U
dc
U
ab1
¼
The line-to-neutral voltages at the load are given as (6.4), again in terms of the
dc link voltage, during six step square wave mode:
r
U
dc
2
3
U
an
¼
p ¼
0
:
471
U
dc
(V
rms
Þ
ð
6
:
4
Þ
p
p
U
dc
¼
0
:
45
U
dc
U
an1
¼
Whereas (6.3) and (6.4) represent the maximum voltage available during six step
square wave mode, they do not represent the maximum voltage that can be applied to
the load during PWM. The switching state diagram in Figure 6.7 can be modified to
include three regions of modulation: (1) PWM region in which switching frequency,
f
s
, can be maintained, (2) pulse dropping region where PWM frequency is reduced by
pulse dropping and (3) overmodulation region, or six step square wave region.
Within the inner, full PWM region, the maximum voltage that can be main-
tained without dropping pulses is
p
p
U
dc
2
U
phase1
¼
ð
V
rms
, fund
Þ
ð
6
:
5
Þ
