Environmental Engineering Reference
In-Depth Information
Here the sensitivity of electrolyte with temperature is taken as
s
e
=5.
When this capacitor is simulated over the normal motor-drive frequency range of
100 Hz base frequency to 5 kHz switching frequency, the plot shown in Figure 4.26
results.
BaTiO ceramic capacitor ESR
0.15
0.144288
0.1
0.05
ESR(
f
)
0.023084
0
1,000
2,000
3,000
4,000
5,000
5×10
3
10
f
Frequency (Hz)
Figure 4.26 ESR variation with frequency for the model in Figure 4.24
The variation in ESR with frequency in Figure 4.26 is calculated when the
capacitor case temperature is held at 60
C by the inverter cold plate and the core
temperature is at 85
C. The frequency knee in Figure 4.26 is given by the dielectric
loss model parameters,
t
d
.
A novel technique with proven ripple current magnitude reduction is described
in Reference 40 wherein the currents to a 6-phase induction machine are shown
regulated by dual inverters, each rated 50% of the machine throughput power, and
having their current regulators phase shifted such that the resulting dc link capacitor
currents are halved in magnitude, but doubled in frequency. Since capacitor heating
is proportional to magnitude squared, this technique offers an opportunity to further
reduce ripple capacitor size.
The model for ESR is used in an inverter simulation to account for losses in the
capacitor bank due to ripple currents from the inverter. The next section presents an
illustration of inverter PWM operation and its contribution to capacitor bank ripple
currents.
4.3.4 Switching frequency and PWM
The example used in this section and shown in Figure 4.27 will be assumed to be
driving an IM automotive starter-alternator in boost mode. In this scenario, the IM
ISA will be operating at 8 kW of boost during a lane change manoeuvre. The
vehicle power supply will be a 42 V advanced battery with an internal resistance of
37 m
W
resulting in an inverter terminal voltage of 33 V. For these conditions the dc
link current will be 242 A
dc
. The inverter in this example uses sine-triangle ramp
comparison in the current regulator to synthesize the output phase voltage.
