Digital Signal Processing Reference
In-Depth Information
v
o
v
i
"1"
v
o
v
r
"0"
v
i
v
r
0
(a)
(b)
Figure 1.18
Comparator.
logic 1; for example, logic 1 is approximately 5 V for TTL (transistor-to-transistor
logic). If is less than the comparator outputs logic zero, which is less than 1 V
for TTL. The comparator is normally shown with the signal ground of Figure 1.18
omitted; however, all voltages are defined relative to the signal ground.
Several different circuits are used to implement analog-to-digital converters,
with each circuit having different characteristics. We now describe the internal
operation of a particular circuit. The
counter-ramp A/D
is depicted in Figure
1.19(a), with the device signals illustrated in Figure 1.19(b) [4]. The
n
-bit counter
begins the count at value zero when the start-of-conversion (SOC) pulse arrives
v
i
(t)
v
r
(t),
V
R
V
R
Analog input
V
x
V
x
EOC
V
R
n
- Bit
DAC
Digital
output
t
n
- Bit
counter
SOC
Clock (
f
c
)
t
T
c
Reset
EOC
Start (SOC)
t
Clock
t
(b)
(a)
Figure 1.19
Counter-ramp analog-to-digital converter. (From C. L. Phillips and H. T. Nagle,
Digital
Control Systems Analysis and Design,
3d ed., Prentice Hall, Upper Saddle River, NJ, 1995.)
