Digital Signal Processing Reference
In-Depth Information
Sampling
switch
Discharging
switch
Sampling gate
pulse
m
(
t
)
s
(
t
)
C
Discharging
gate pulse
(a)
s
(
t
)
m
(
t
)
0
T
T
s
T
s
T
2
T
s
3
T
s
t
Sampling gate pulse
applied to
sampling switch
Discharge gate pulse
applied to discharging switch
Figure 6.46
A flat-top pulse-amplitude
modulation system.
(b)
PAM signal can be produced by an electronic sample-and-hold circuit such as that
shown in Figure 6.46(a) [6].
The analog signal to be sampled is applied to the input terminals. A gating
pulse causes the FET (field-effect transistor)
sampling switch
to conduct briefly, but
long enough for the capacitor to charge up to the voltage level of the input signal.
Once the gating pulse is terminated, the
sampling switch
is “closed,” and the capac-
itor remains charged at a constant voltage level until a second gating pulse causes
the
discharging switch
to conduct and provide a low-resistance discharge path. The
output signal can be approximated as a train of rectangular pulses, as shown in
Figure 6.46(b).
For mathematical analysis of
flat-top
PAM signal generation, we can model
the
sample-and-hold
circuit as a linear system that has the impulse response shown
in Figure 6.47:
t
-
T/2
T
B
R
h(t) = rect
.
The input to the linear system is then modeled as the sampled-data signal (5.40):
q
n=-
q
m
S
(t) = m(t)d
T
(t) =
m(nT
s
)d(t - nT
s
).
