Hardware Reference
In-Depth Information
Symmetric Architecture Bipolar Bus
SPI is in many ways an elegant solution for chip-to-chip communication; however, it has significant drawbacks that
limit its use:
•
The first problem is that as the number of slave devices increases, so does the number of SS
lines. This can certainly be a problem for pin-intensive projects. Without extra logic such as a
MUX, even the Mega can run out of pins.
•
The second problem is that the SPI architecture is not resilient to changes. It will work as
configured, but you must take great care of design when adding or removing nodes. There is
no real hot-swap ability native to SPI. And, should the master device become compromised,
the whole network will collapse. When a slave device needs to request data transfers, you need
to add a data-ready line. The data-ready signal output from the slave tells the master that data
needs to be transferred. To add a data-ready line we will need additional connections for each
additional slave. All data-flow control is placed on the master, which can limit the functionality
of the master, as it may need to spend a significant amount of processor resources to monitor
and handle communication.
•
Finally, one slave cannot communicate directly with another. Even if the master were to route
the data from one slave to another, there would be a great loss of efficiency, as the data would
have to be transmitted twice. The solution to all these problems is a custom protocol.
Douglas Bebb of MAD Fellows developed a bus architecture as an open standard to better serve in chip-to-
chip communication. This architecture and protocol is called the
Symmetric Architecture Bipolar Bus (SABB)
. It is a
standard in active open development and goes beyond functionality on the Arduino, but can be fully demonstrated
on any Arduino board. On the Arduino, it is built on the SPI block, and so uses registers and methodologies discussed
earlier, but takes best practices and turns them on their head.
Again, for reference, SPI defines a standard that has unique master/slave devices, full-duplex transmission, and
a shared serial clock. Much is left undefined when using SPI, which is both an advantage and drawback. SABB is
designed to be more robust while still allowing flexibility. The highlights of SABB include the following:
•
Full-duplex communication
•
Synchronous serial
•
Roleless devices
•
Hot-swap capabilities
•
Individual addressing capabilities
•
Address-broadcasting capabilities
•
Backward compatibility to SPI
•
Modular and redundant design
•
Four-wire bus (no extra SS or data-ready lines needed for extra devices)
The logical and electrical connections in SABB are similar to SPI, with the exception that the SS line is shared
between all SABB-enabled devices. Figure
10-3
shows a logical block diagram of this feature.
